X-Git-Url: http://git.rohieb.name/hackover2013-badge-firmware.git/blobdiff_plain/9d18e10afb2439a6a9ba6978a799259746a837b7..27b0e5eaba49390940b8d8aba675ba807f74147e:/core/gpio/gpio.c?ds=sidebyside

diff --git a/core/gpio/gpio.c b/core/gpio/gpio.c
index 3809a5e..9c84655 100644
--- a/core/gpio/gpio.c
+++ b/core/gpio/gpio.c
@@ -47,6 +47,10 @@
 volatile uint32_t chibi_counter  = 0;
 #endif
 
+#ifdef CFG_ALTRESET
+#include "core/cpu/cpu.h"
+#endif
+
 static bool _gpioInitialised = false;
 
 /**************************************************************************/
@@ -75,6 +79,15 @@ void PIOINT1_IRQHandler(void)
 {
   uint32_t regVal;
 
+#if defined CFG_ALTRESET && CFG_ALTRESET_PORT == 1
+  regVal = gpioIntStatus(CFG_ALTRESET_PORT, CFG_ALTRESET_PIN);
+  if (regVal)
+  {
+    // Cause a reset and wait
+    cpuReset();
+  }
+#endif
+
 #ifdef CFG_CHIBI
   // Check for interrupt on 1.8
   regVal = gpioIntStatus(1, 8);
@@ -312,9 +325,9 @@ void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t s
   if (!_gpioInitialised) gpioInit();
 
   // Get the appropriate register (handled this way to optimise code size)
-  REG32 *gpiois  = &GPIO_GPIO0IS;
-  REG32 *gpioibe = &GPIO_GPIO0IBE;
-  REG32 *gpioiev = &GPIO_GPIO0IEV;
+  REG32 *gpiois  = &GPIO_GPIO0IS;   // Interrupt sense (edge or level sensitive)
+  REG32 *gpioibe = &GPIO_GPIO0IBE;  // Interrupt both edges (0 = int controlled by GPIOIEV, 1 = both edges trigger interrupt)
+  REG32 *gpioiev = &GPIO_GPIO0IEV;  // 0 = falling edge or low, 1 = rising edge or high (depending on GPIOIS)
   switch (portNum)
   {
     case 0:
@@ -339,18 +352,18 @@ void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t s
       break;
   }
 
-  if (gpioInterruptSense_Edge)
+
+  if (sense == gpioInterruptSense_Edge)
   {
     *gpiois &= ~(0x1<<bitPos);
-    /* single or double only applies when sense is 0(edge trigger). */
-    gpioInterruptEdge_Single ? (*gpioibe &= ~(0x1<<bitPos)) : (*gpioibe |= (0x1<<bitPos));
+    edge == gpioInterruptEdge_Single ? (*gpioibe &= ~(0x1<<bitPos)) : (*gpioibe |= (0x1<<bitPos));
   }
   else
   {
     *gpiois |= (0x1<<bitPos);
   }
 
-  gpioInterruptEvent_ActiveHigh ? (*gpioiev &= ~(0x1<<bitPos)) : (*gpioiev |= (0x1<<bitPos));
+  event == gpioInterruptEvent_ActiveHigh ? (*gpioiev &= ~(0x1<<bitPos)) : (*gpioiev |= (0x1<<bitPos));
 
   return;
 }