X-Git-Url: http://git.rohieb.name/hackover2013-badge-firmware.git/blobdiff_plain/9d18e10afb2439a6a9ba6978a799259746a837b7..e8940d3dd9a3c23e904ac75c40cf1f8e546f52fe:/core/ssp/ssp.c?ds=sidebyside

diff --git a/core/ssp/ssp.c b/core/ssp/ssp.c
index 284945c..b6beef2 100644
--- a/core/ssp/ssp.c
+++ b/core/ssp/ssp.c
@@ -2,8 +2,6 @@
 /*! 
     @file     ssp.c
     @author   K. Townsend (microBuilder.eu)
-    @date     22 March 2010
-    @version  0.10
 
     @section DESCRIPTION
 
@@ -40,7 +38,7 @@
 
     Software License Agreement (BSD License)
 
-    Copyright (c) 2010, microBuilder SARL
+    Copyright (c) 2012, K. Townsend
     All rights reserved.
 
     Redistribution and use in source and binary forms, with or without
@@ -181,7 +179,7 @@ void sspInit (uint8_t portNum, sspClockPolarity_t polarity, sspClockPhase_t phas
     gpioSetValue(SSP0_CSPORT, SSP0_CSPIN, 1);
     gpioSetPullup(&IOCON_PIO0_2, gpioPullupMode_Inactive);  // Board has external pull-up
   
-    /* If SSP0CLKDIV = DIV1 -- (PCLK / (CPSDVSR × [SCR+1])) = (72,000,000 / (2 x [8 + 1])) = 4.0 MHz */
+    /* If SSP0CLKDIV = DIV1 -- (PCLK / (CPSDVSR � [SCR+1])) = (72,000,000 / (2 x [8 + 1])) = 4.0 MHz */
     uint32_t configReg = ( SSP_SSP0CR0_DSS_8BIT   // Data size = 8-bit
                   | SSP_SSP0CR0_FRF_SPI           // Frame format = SPI
                   | SSP_SSP0CR0_SCR_8);           // Serial clock rate = 8