From 2e18bf4e11b78ec045d27baac233f1337b0d8340 Mon Sep 17 00:00:00 2001
From: Kevin Townsend <kevin@ktownsend.com>
Date: Wed, 18 Jan 2012 21:25:27 +0100
Subject: [PATCH] bug fixes

---
 drivers/lcd/tft/hw/ssd1331.c | 34 ++++++++++++++--------------------
 drivers/lcd/tft/hw/ssd1331.h |  4 ++++
 2 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/drivers/lcd/tft/hw/ssd1331.c b/drivers/lcd/tft/hw/ssd1331.c
index ddc8694..a5ac130 100644
--- a/drivers/lcd/tft/hw/ssd1331.c
+++ b/drivers/lcd/tft/hw/ssd1331.c
@@ -49,20 +49,8 @@ static lcdProperties_t ssd1331Properties = { 96, 64, false, false, false };
 /* Private Methods                               */
 /*************************************************/
 
-// You can speed all of these slow GPIO calls up by using the SET/CLR macros!
-
-#define CMD(c)        do { gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 1 ); \
-                           gpioSetValue( SSD1331_DC_PORT, SSD1331_DC_PIN, 0 ); \
-                           gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 0 ); \
-                           ssd1331SendByte( c ); \
-                           gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 1 ); \
-                         } while (0);
-#define DATA(c)       do { gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 1 ); \
-                           gpioSetValue( SSD1331_DC_PORT, SSD1331_DC_PIN, 1 ); \
-                           gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 0 ); \
-                           ssd1331SendByte( c ); \
-                           gpioSetValue( SSD1331_CS_PORT, SSD1331_CS_PIN, 1 ); \
-                         } while (0);
+#define CMD(c)        do { SET_CS; CLR_DC; CLR_CS; ssd1331SendByte( c ); SET_CS; } while (0)
+#define DATA(c)       do { SET_CS; SET_DC; CLR_CS; ssd1331SendByte( c ); SET_CS; } while (0);
 #define DELAY(mS)     do { systickDelay( mS / CFG_SYSTICK_DELAY_IN_MS ); } while(0);
 
 /**************************************************************************/
@@ -78,17 +66,24 @@ void ssd1331SendByte(uint8_t byte)
   int8_t i;
 
   // Make sure clock pin starts high
-  gpioSetValue(SSD1331_SCK_PORT, SSD1331_SCK_PIN, 1);
+  SET_SCK;
 
   // Write from MSB to LSB
   for (i=7; i>=0; i--) 
   {
     // Set clock pin low
-    gpioSetValue(SSD1331_SCK_PORT, SSD1331_SCK_PIN, 0);
+    CLR_SCK;
     // Set data pin high or low depending on the value of the current bit
-    gpioSetValue(SSD1331_SID_PORT, SSD1331_SID_PIN, byte & (1 << i) ? 1 : 0);
+    if (byte & (1 << i))
+    {
+      SET_SID;
+    }
+    else
+    {
+      CLR_SID;
+    }
     // Set clock pin high
-    gpioSetValue(SSD1331_SCK_PORT, SSD1331_SCK_PIN, 1);
+    SET_SCK;
   }
 }
 
@@ -121,8 +116,7 @@ uint16_t ssd1331Read(uint16_t addr)
 /**************************************************************************/
 uint16_t ssd1331Type(void)
 {
-  // ToDo
-  return 0;
+  return 0x1331;
 }
 
 /**************************************************************************/
diff --git a/drivers/lcd/tft/hw/ssd1331.h b/drivers/lcd/tft/hw/ssd1331.h
index ff0931a..bd98594 100644
--- a/drivers/lcd/tft/hw/ssd1331.h
+++ b/drivers/lcd/tft/hw/ssd1331.h
@@ -74,6 +74,10 @@
 #define SET_RST         SSD1331_GPIO2DATA_RST = (1 << SSD1331_RST_PIN)
 #define CLR_CS          SSD1331_GPIO2DATA_CS = (0)
 #define SET_CS          SSD1331_GPIO2DATA_CS = (1 << SSD1331_CS_PIN)
+#define CLR_SCK         SSD1331_GPIO2DATA_SCK = (0)
+#define SET_SCK         SSD1331_GPIO2DATA_SCK = (1 << SSD1331_SCK_PIN)
+#define CLR_SID         SSD1331_GPIO2DATA_SID = (0)
+#define SET_SID         SSD1331_GPIO2DATA_SID = (1 << SSD1331_SID_PIN)
 
 enum
 {
-- 
2.20.1