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[openwrt.git] / target / linux / omap24xx / patches-3.1 / 310-n810-lcd.patch
1 Index: linux-3.1/arch/arm/mach-omap2/board-n8x0.c
2 ===================================================================
3 --- linux-3.1.orig/arch/arm/mach-omap2/board-n8x0.c 2011-10-30 21:14:31.600257909 +0100
4 +++ linux-3.1/arch/arm/mach-omap2/board-n8x0.c 2011-10-30 21:14:46.712140689 +0100
5 @@ -24,6 +24,7 @@
6 #include <linux/spi/spi.h>
7 #include <linux/usb/musb.h>
8 #include <sound/tlv320aic3x.h>
9 +#include <linux/spi/tsc2005.h>
10
11 #include <asm/mach/arch.h>
12 #include <asm/mach-types.h>
13 @@ -43,6 +44,66 @@ static int slot1_cover_open;
14 static int slot2_cover_open;
15 static struct device *mmc_device;
16
17 +#define RX51_TSC2005_RESET_GPIO 94
18 +#define RX51_TSC2005_IRQ_GPIO 106
19 +
20 +#ifdef CONFIG_TOUCHSCREEN_TSC2005
21 +static struct tsc2005_platform_data tsc2005_config;
22 +static void rx51_tsc2005_set_reset(bool enable)
23 +{
24 + gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
25 +}
26 +
27 +static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
28 + .turbo_mode = 0,
29 + .single_channel = 1,
30 +};
31 +#endif
32 +
33 +static void __init tsc2005_set_config(void)
34 +{
35 + const struct omap_lcd_config *conf;
36 +
37 + conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
38 + if (conf != NULL) {
39 +#ifdef CONFIG_TOUCHSCREEN_TSC2005
40 + if (strcmp(conf->panel_name, "lph8923") == 0) {
41 + tsc2005_config.ts_x_plate_ohm = 180;
42 + tsc2005_config.ts_pressure_max = 2048;
43 + tsc2005_config.ts_pressure_fudge = 2;
44 + tsc2005_config.ts_x_max = 4096;
45 + tsc2005_config.ts_x_fudge = 4;
46 + tsc2005_config.ts_y_max = 4096;
47 + tsc2005_config.ts_y_fudge = 7;
48 + tsc2005_config.set_reset = rx51_tsc2005_set_reset;
49 + } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
50 + tsc2005_config.ts_x_plate_ohm = 280;
51 + tsc2005_config.ts_pressure_max = 2048;
52 + tsc2005_config.ts_pressure_fudge = 2;
53 + tsc2005_config.ts_x_max = 4096;
54 + tsc2005_config.ts_x_fudge = 4;
55 + tsc2005_config.ts_y_max = 4096;
56 + tsc2005_config.ts_y_fudge = 7;
57 + tsc2005_config.set_reset = rx51_tsc2005_set_reset;
58 + } else {
59 + printk(KERN_ERR "Unknown panel type, set default "
60 + "touchscreen configuration\n");
61 + tsc2005_config.ts_x_plate_ohm = 200;
62 + }
63 +#endif
64 + }
65 +}
66 +
67 +static struct omap2_mcspi_device_config mipid_mcspi_config = {
68 + .turbo_mode = 0,
69 + .single_channel = 1,
70 +};
71 +
72 +extern struct mipid_platform_data n8x0_mipid_platform_data;
73 +
74 +extern void n8x0_mipid_init(void);
75 +extern void n8x0_blizzard_init(void);
76 +
77 #define TUSB6010_ASYNC_CS 1
78 #define TUSB6010_SYNC_CS 4
79 #define TUSB6010_GPIO_INT 58
80 @@ -145,12 +206,29 @@ static struct omap2_mcspi_device_config
81
82 static struct spi_board_info n800_spi_board_info[] __initdata = {
83 {
84 + .modalias = "lcd_mipid",
85 + .bus_num = 1,
86 + .chip_select = 1,
87 + .max_speed_hz = 4000000,
88 + .controller_data= &mipid_mcspi_config,
89 + .platform_data = &n8x0_mipid_platform_data,
90 + },
91 + {
92 .modalias = "p54spi",
93 .bus_num = 2,
94 .chip_select = 0,
95 .max_speed_hz = 48000000,
96 .controller_data = &p54spi_mcspi_config,
97 },
98 + {
99 + .modalias = "tsc2005",
100 + .bus_num = 1,
101 + .chip_select = 0,
102 + .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
103 + .max_speed_hz = 6000000,
104 + .controller_data = &tsc2005_mcspi_config,
105 + .platform_data = &tsc2005_config,
106 + },
107 };
108
109 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
110 @@ -789,6 +867,7 @@ static void __init n8x0_init_machine(voi
111 n8x0_cbus_init();
112
113 /* FIXME: add n810 spi devices */
114 + tsc2005_set_config();
115 spi_register_board_info(n800_spi_board_info,
116 ARRAY_SIZE(n800_spi_board_info));
117 omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
118 @@ -798,6 +877,8 @@ static void __init n8x0_init_machine(voi
119 i2c_register_board_info(2, n810_i2c_board_info_2,
120 ARRAY_SIZE(n810_i2c_board_info_2));
121 board_serial_init();
122 + n8x0_mipid_init();
123 + n8x0_blizzard_init();
124 gpmc_onenand_init(board_onenand_data);
125 n8x0_mmc_init();
126 n8x0_usb_init();
127 Index: linux-3.1/arch/arm/mach-omap2/board-n8x0-lcd.c
128 ===================================================================
129 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
130 +++ linux-3.1/arch/arm/mach-omap2/board-n8x0-lcd.c 2011-10-30 21:14:46.712140689 +0100
131 @@ -0,0 +1,231 @@
132 +/*
133 + * linux/arch/arm/mach-omap2/board-n8x0.c
134 + *
135 + * Copyright (C) 2005-2009 Nokia Corporation
136 + * Author: Juha Yrjola <juha.yrjola@nokia.com>
137 + *
138 + * Modified from mach-omap2/board-generic.c
139 + *
140 + * This program is free software; you can redistribute it and/or modify
141 + * it under the terms of the GNU General Public License version 2 as
142 + * published by the Free Software Foundation.
143 + */
144 +
145 +#include <linux/clk.h>
146 +#include <linux/delay.h>
147 +#include <linux/gpio.h>
148 +#include <linux/omapfb.h>
149 +
150 +#include <plat/lcd_mipid.h>
151 +#include <plat/blizzard.h>
152 +
153 +#include "../../../drivers/cbus/tahvo.h"
154 +
155 +
156 +struct tahvo_pwm_device {
157 + struct device *dev;
158 + int tahvo_7bit_backlight;
159 +};
160 +
161 +static struct tahvo_pwm_device *tahvo_pwm;
162 +
163 +static unsigned int tahvo_pwm_get_backlight_level(struct tahvo_pwm_device *pd)
164 +{
165 + unsigned int mask;
166 +
167 + if (pd->tahvo_7bit_backlight)
168 + mask = 0x7f;
169 + else
170 + mask = 0x0f;
171 + return tahvo_read_reg(pd->dev, TAHVO_REG_LEDPWMR) & mask;
172 +}
173 +
174 +static unsigned int tahvo_pwm_get_max_backlight_level(struct tahvo_pwm_device *pd)
175 +{
176 + if (pd->tahvo_7bit_backlight)
177 + return 0x7f;
178 + return 0x0f;
179 +}
180 +
181 +static void tahvo_pwm_set_backlight_level(struct tahvo_pwm_device *pd, unsigned int level)
182 +{
183 + unsigned int max_level;
184 +
185 + max_level = tahvo_pwm_get_max_backlight_level(pd);
186 + if (level > max_level)
187 + level = max_level;
188 + tahvo_write_reg(pd->dev, TAHVO_REG_LEDPWMR, level);
189 +}
190 +
191 +static int __init n8x0_tahvo_pwm_probe(struct platform_device *pdev)
192 +{
193 + struct tahvo_pwm_device *pd;
194 + unsigned int rev, id;
195 +
196 + pd = kzalloc(sizeof(*pd), GFP_KERNEL);
197 + if (WARN_ON(!pd))
198 + return -ENOMEM;
199 + pd->dev = &pdev->dev;
200 +
201 + rev = tahvo_read_reg(pd->dev, TAHVO_REG_ASICR);
202 + id = (rev >> 8) & 0xff;
203 + if (id == 0x03) {
204 + if ((rev & 0xff) >= 0x50)
205 + pd->tahvo_7bit_backlight = 1;
206 + } else if (id == 0x0b)
207 + pd->tahvo_7bit_backlight = 1;
208 +
209 + dev_set_drvdata(pd->dev, pd);
210 + tahvo_pwm = pd;
211 +
212 + return 0;
213 +}
214 +
215 +static struct platform_driver n8x0_tahvo_pwm_driver = {
216 + .driver = {
217 + .name = "tahvo-pwm",
218 + },
219 +};
220 +
221 +static int __init n8x0_tahvo_pwm_init(void)
222 +{
223 + return platform_driver_probe(&n8x0_tahvo_pwm_driver, n8x0_tahvo_pwm_probe);
224 +}
225 +fs_initcall(n8x0_tahvo_pwm_init);
226 +
227 +static int n8x0_get_backlight_level(struct mipid_platform_data *pdata)
228 +{
229 + return tahvo_pwm_get_backlight_level(tahvo_pwm);
230 +}
231 +
232 +static int n8x0_get_max_backlight_level(struct mipid_platform_data *pdata)
233 +{
234 + return tahvo_pwm_get_max_backlight_level(tahvo_pwm);
235 +}
236 +
237 +static void n8x0_set_backlight_level(struct mipid_platform_data *pdata, int level)
238 +{
239 + tahvo_pwm_set_backlight_level(tahvo_pwm, level);
240 +}
241 +
242 +#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
243 +
244 +// MIPID LCD Panel
245 +
246 +static void mipid_shutdown(struct mipid_platform_data *pdata)
247 +{
248 + if (pdata->nreset_gpio != -1) {
249 + pr_info("shutdown LCD\n");
250 + gpio_set_value(pdata->nreset_gpio, 0);
251 + msleep(120);
252 + }
253 +}
254 +
255 +struct mipid_platform_data n8x0_mipid_platform_data = {
256 + .shutdown = mipid_shutdown,
257 + .get_bklight_level = n8x0_get_backlight_level,
258 + .set_bklight_level = n8x0_set_backlight_level,
259 + .get_bklight_max = n8x0_get_max_backlight_level,
260 +};
261 +
262 +void __init n8x0_mipid_init(void)
263 +{
264 + const struct omap_lcd_config *conf;
265 + int err;
266 +
267 + conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
268 + if (conf != NULL) {
269 + n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
270 + n8x0_mipid_platform_data.data_lines = conf->data_lines;
271 + if (conf->nreset_gpio != -1) {
272 + err = gpio_request(conf->nreset_gpio, "MIPID nreset");
273 + if (err) {
274 + printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
275 + conf->nreset_gpio);
276 + } else {
277 + err = gpio_direction_output(conf->nreset_gpio, 1);
278 + if (err) {
279 + printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
280 + conf->nreset_gpio);
281 + }
282 + }
283 + }
284 + printk(KERN_INFO "N8x0 MIPID config loaded");
285 + }
286 + else
287 + printk(KERN_INFO "N8x0 MIPID config not provided");
288 +}
289 +
290 +
291 +// Epson Blizzard LCD Controller
292 +
293 +static struct {
294 + struct clk *sys_ck;
295 +} blizzard;
296 +
297 +static int blizzard_get_clocks(void)
298 +{
299 + blizzard.sys_ck = clk_get(0, "osc_ck");
300 + if (IS_ERR(blizzard.sys_ck)) {
301 + printk(KERN_ERR "can't get Blizzard clock\n");
302 + return PTR_ERR(blizzard.sys_ck);
303 + }
304 + return 0;
305 +}
306 +
307 +static unsigned long blizzard_get_clock_rate(struct device *dev)
308 +{
309 + return clk_get_rate(blizzard.sys_ck);
310 +}
311 +
312 +static void blizzard_enable_clocks(int enable)
313 +{
314 + if (enable)
315 + clk_enable(blizzard.sys_ck);
316 + else
317 + clk_disable(blizzard.sys_ck);
318 +}
319 +
320 +static void blizzard_power_up(struct device *dev)
321 +{
322 + /* Vcore to 1.475V */
323 + tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0, 0xf);
324 + msleep(10);
325 +
326 + blizzard_enable_clocks(1);
327 + gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
328 +}
329 +
330 +static void blizzard_power_down(struct device *dev)
331 +{
332 + gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
333 + blizzard_enable_clocks(0);
334 +
335 + /* Vcore to 1.005V */
336 + tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0xf, 0);
337 +}
338 +
339 +static struct blizzard_platform_data n8x0_blizzard_data = {
340 + .power_up = blizzard_power_up,
341 + .power_down = blizzard_power_down,
342 + .get_clock_rate = blizzard_get_clock_rate,
343 + .te_connected = 1,
344 +};
345 +
346 +void __init n8x0_blizzard_init(void)
347 +{
348 + int r;
349 +
350 + r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
351 + if (r < 0)
352 + {
353 + printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
354 + return;
355 + }
356 + gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
357 +
358 + blizzard_get_clocks();
359 + omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
360 +
361 + printk(KERN_INFO "N8x0 Blizzard initialized");
362 +}
363 Index: linux-3.1/arch/arm/mach-omap2/Makefile
364 ===================================================================
365 --- linux-3.1.orig/arch/arm/mach-omap2/Makefile 2011-10-30 21:14:31.608257847 +0100
366 +++ linux-3.1/arch/arm/mach-omap2/Makefile 2011-10-30 21:14:46.712140689 +0100
367 @@ -209,6 +209,7 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) += boar
368 hsmmc.o \
369 board-flash.o
370 obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
371 +obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
372 obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
373 sdram-nokia.o \
374 hsmmc.o
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