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[openwrt.git] / target / linux / ar7 / files / drivers / net / cpmac.c
1 /*
2 * $Id$
3 *
4 * Copyright (C) 2006, 2007 OpenWrt.org
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/moduleparam.h>
24
25 #include <linux/sched.h>
26 #include <linux/kernel.h> /* printk() */
27 #include <linux/slab.h>
28 #include <linux/errno.h>
29 #include <linux/types.h>
30 #include <linux/delay.h>
31 #include <linux/version.h>
32
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/skbuff.h>
37 #include <linux/mii.h>
38 #include <linux/phy.h>
39 #include <linux/platform_device.h>
40 #include <asm/ar7/ar7.h>
41 #include <gpio.h>
42
43 MODULE_AUTHOR("Eugene Konev");
44 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
45 MODULE_LICENSE("GPL");
46
47 static int rx_ring_size = 64;
48 static int disable_napi = 0;
49 module_param(rx_ring_size, int, 64);
50 module_param(disable_napi, int, 0);
51 MODULE_PARM_DESC(rx_ring_size, "Size of rx ring (in skbs)");
52 MODULE_PARM_DESC(disable_napi, "Disable NAPI polling");
53
54 /* Register definitions */
55 struct cpmac_control_regs {
56 volatile u32 revision;
57 volatile u32 control;
58 volatile u32 teardown;
59 volatile u32 unused;
60 } __attribute__ ((packed));
61
62 struct cpmac_int_regs {
63 volatile u32 stat_raw;
64 volatile u32 stat_masked;
65 volatile u32 enable;
66 volatile u32 clear;
67 } __attribute__ ((packed));
68
69 struct cpmac_stats {
70 volatile u32 good;
71 volatile u32 bcast;
72 volatile u32 mcast;
73 volatile u32 pause;
74 volatile u32 crc_error;
75 volatile u32 align_error;
76 volatile u32 oversized;
77 volatile u32 jabber;
78 volatile u32 undersized;
79 volatile u32 fragment;
80 volatile u32 filtered;
81 volatile u32 qos_filtered;
82 volatile u32 octets;
83 } __attribute__ ((packed));
84
85 struct cpmac_regs {
86 struct cpmac_control_regs tx_ctrl;
87 struct cpmac_control_regs rx_ctrl;
88 volatile u32 unused1[56];
89 volatile u32 mbp;
90 /* MBP bits */
91 #define MBP_RXPASSCRC 0x40000000
92 #define MBP_RXQOS 0x20000000
93 #define MBP_RXNOCHAIN 0x10000000
94 #define MBP_RXCMF 0x01000000
95 #define MBP_RXSHORT 0x00800000
96 #define MBP_RXCEF 0x00400000
97 #define MBP_RXPROMISC 0x00200000
98 #define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
99 #define MBP_RXBCAST 0x00002000
100 #define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
101 #define MBP_RXMCAST 0x00000020
102 #define MBP_MCASTCHAN(chan) ((chan) & 0x7)
103 volatile u32 unicast_enable;
104 volatile u32 unicast_clear;
105 volatile u32 max_len;
106 volatile u32 buffer_offset;
107 volatile u32 filter_flow_threshold;
108 volatile u32 unused2[2];
109 volatile u32 flow_thre[8];
110 volatile u32 free_buffer[8];
111 volatile u32 mac_control;
112 #define MAC_TXPTYPE 0x00000200
113 #define MAC_TXPACE 0x00000040
114 #define MAC_MII 0x00000020
115 #define MAC_TXFLOW 0x00000010
116 #define MAC_RXFLOW 0x00000008
117 #define MAC_MTEST 0x00000004
118 #define MAC_LOOPBACK 0x00000002
119 #define MAC_FDX 0x00000001
120 volatile u32 mac_status;
121 #define MACST_QOS 0x4
122 #define MACST_RXFLOW 0x2
123 #define MACST_TXFLOW 0x1
124 volatile u32 emc_control;
125 volatile u32 unused3;
126 struct cpmac_int_regs tx_int;
127 volatile u32 mac_int_vector;
128 /* Int Status bits */
129 #define INTST_STATUS 0x80000
130 #define INTST_HOST 0x40000
131 #define INTST_RX 0x20000
132 #define INTST_TX 0x10000
133 volatile u32 mac_eoi_vector;
134 volatile u32 unused4[2];
135 struct cpmac_int_regs rx_int;
136 volatile u32 mac_int_stat_raw;
137 volatile u32 mac_int_stat_masked;
138 volatile u32 mac_int_enable;
139 volatile u32 mac_int_clear;
140 volatile u32 mac_addr_low[8];
141 volatile u32 mac_addr_mid;
142 volatile u32 mac_addr_high;
143 volatile u32 mac_hash_low;
144 volatile u32 mac_hash_high;
145 volatile u32 boff_test;
146 volatile u32 pac_test;
147 volatile u32 rx_pause;
148 volatile u32 tx_pause;
149 volatile u32 unused5[2];
150 struct cpmac_stats rx_stats;
151 struct cpmac_stats tx_stats;
152 volatile u32 unused6[232];
153 volatile u32 tx_ptr[8];
154 volatile u32 rx_ptr[8];
155 volatile u32 tx_ack[8];
156 volatile u32 rx_ack[8];
157
158 } __attribute__ ((packed));
159
160 struct cpmac_mdio_regs {
161 volatile u32 version;
162 volatile u32 control;
163 #define MDIOC_IDLE 0x80000000
164 #define MDIOC_ENABLE 0x40000000
165 #define MDIOC_PREAMBLE 0x00100000
166 #define MDIOC_FAULT 0x00080000
167 #define MDIOC_FAULTDETECT 0x00040000
168 #define MDIOC_INTTEST 0x00020000
169 #define MDIOC_CLKDIV(div) ((div) & 0xff)
170 volatile u32 alive;
171 volatile u32 link;
172 struct cpmac_int_regs link_int;
173 struct cpmac_int_regs user_int;
174 u32 unused[20];
175 volatile u32 access;
176 #define MDIO_BUSY 0x80000000
177 #define MDIO_WRITE 0x40000000
178 #define MDIO_REG(reg) (((reg) & 0x1f) << 21)
179 #define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
180 #define MDIO_DATA(data) ((data) & 0xffff)
181 volatile u32 physel;
182 } __attribute__ ((packed));
183
184 /* Descriptor */
185 struct cpmac_desc {
186 u32 hw_next;
187 u32 hw_data;
188 u16 buflen;
189 u16 bufflags;
190 u16 datalen;
191 u16 dataflags;
192 /* Flags bits */
193 #define CPMAC_SOP 0x8000
194 #define CPMAC_EOP 0x4000
195 #define CPMAC_OWN 0x2000
196 #define CPMAC_EOQ 0x1000
197 struct sk_buff *skb;
198 struct cpmac_desc *next;
199 } __attribute__ ((packed));
200
201 struct cpmac_priv {
202 struct net_device_stats stats;
203 spinlock_t lock;
204 struct sk_buff *skb_pool;
205 int free_skbs;
206 struct cpmac_desc *rx_head;
207 int tx_head, tx_tail;
208 struct cpmac_desc *desc_ring;
209 struct cpmac_regs *regs;
210 struct mii_bus *mii_bus;
211 struct phy_device *phy;
212 char phy_name[BUS_ID_SIZE];
213 struct plat_cpmac_data *config;
214 int oldlink, oldspeed, oldduplex;
215 u32 msg_enable;
216 struct net_device *dev;
217 struct work_struct alloc_work;
218 };
219
220 static irqreturn_t cpmac_irq(int, void *);
221 static void cpmac_reset(struct net_device *dev);
222 static void cpmac_hw_init(struct net_device *dev);
223 static int cpmac_stop(struct net_device *dev);
224 static int cpmac_open(struct net_device *dev);
225
226 #undef CPMAC_DEBUG
227 #define CPMAC_LOW_THRESH 32
228 #define CPMAC_ALLOC_SIZE 64
229 #define CPMAC_SKB_SIZE 1518
230 #define CPMAC_TX_RING_SIZE 8
231
232 #ifdef CPMAC_DEBUG
233 static void cpmac_dump_regs(u32 *base, int count)
234 {
235 int i;
236 for (i = 0; i < (count + 3) / 4; i++) {
237 if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4);
238 printk(" 0x%08x", *(base + i));
239 }
240 printk("\n");
241 }
242
243 static const char *cpmac_dump_buf(const uint8_t * buf, unsigned size)
244 {
245 static char buffer[3 * 25 + 1];
246 char *p = &buffer[0];
247 if (size > 20)
248 size = 20;
249 while (size-- > 0) {
250 p += sprintf(p, " %02x", *buf++);
251 }
252 return buffer;
253 }
254 #endif
255
256 static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
257 {
258 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
259 volatile u32 val;
260
261 while ((val = regs->access) & MDIO_BUSY);
262 regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) |
263 MDIO_PHY(phy_id & 0x1f);
264 while ((val = regs->access) & MDIO_BUSY);
265
266 return val & 0xffff;
267 }
268
269 static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
270 {
271 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
272 volatile u32 tmp;
273
274 while ((tmp = regs->access) & MDIO_BUSY);
275 regs->access = MDIO_BUSY | MDIO_WRITE |
276 MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) |
277 val;
278
279 return 0;
280 }
281
282 static int cpmac_mdio_reset(struct mii_bus *bus)
283 {
284 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
285
286 ar7_device_reset(AR7_RESET_BIT_MDIO);
287 regs->control = MDIOC_ENABLE |
288 MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
289
290 return 0;
291 }
292
293 static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
294
295 static struct mii_bus cpmac_mii = {
296 .name = "cpmac-mii",
297 .read = cpmac_mdio_read,
298 .write = cpmac_mdio_write,
299 .reset = cpmac_mdio_reset,
300 .irq = mii_irqs,
301 };
302
303 static int cpmac_config(struct net_device *dev, struct ifmap *map)
304 {
305 if (dev->flags & IFF_UP)
306 return -EBUSY;
307
308 /* Don't allow changing the I/O address */
309 if (map->base_addr != dev->base_addr)
310 return -EOPNOTSUPP;
311
312 /* ignore other fields */
313 return 0;
314 }
315
316 static int cpmac_set_mac_address(struct net_device *dev, void *addr)
317 {
318 struct sockaddr *sa = addr;
319
320 if (dev->flags & IFF_UP)
321 return -EBUSY;
322
323 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
324
325 return 0;
326 }
327
328 static void cpmac_set_multicast_list(struct net_device *dev)
329 {
330 struct dev_mc_list *iter;
331 int i;
332 int hash, tmp;
333 int hashlo = 0, hashhi = 0;
334 struct cpmac_priv *priv = netdev_priv(dev);
335
336 if(dev->flags & IFF_PROMISC) {
337 priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
338 priv->regs->mbp |= MBP_RXPROMISC;
339 } else {
340 priv->regs->mbp &= ~MBP_RXPROMISC;
341 if(dev->flags & IFF_ALLMULTI) {
342 /* enable all multicast mode */
343 priv->regs->mac_hash_low = 0xffffffff;
344 priv->regs->mac_hash_high = 0xffffffff;
345 } else {
346 for(i = 0, iter = dev->mc_list; i < dev->mc_count;
347 i++, iter = iter->next) {
348 hash = 0;
349 tmp = iter->dmi_addr[0];
350 hash ^= (tmp >> 2) ^ (tmp << 4);
351 tmp = iter->dmi_addr[1];
352 hash ^= (tmp >> 4) ^ (tmp << 2);
353 tmp = iter->dmi_addr[2];
354 hash ^= (tmp >> 6) ^ tmp;
355 tmp = iter->dmi_addr[4];
356 hash ^= (tmp >> 2) ^ (tmp << 4);
357 tmp = iter->dmi_addr[5];
358 hash ^= (tmp >> 4) ^ (tmp << 2);
359 tmp = iter->dmi_addr[6];
360 hash ^= (tmp >> 6) ^ tmp;
361 hash &= 0x3f;
362 if(hash < 32) {
363 hashlo |= 1<<hash;
364 } else {
365 hashhi |= 1<<(hash - 32);
366 }
367 }
368
369 priv->regs->mac_hash_low = hashlo;
370 priv->regs->mac_hash_high = hashhi;
371 }
372 }
373 }
374
375 static struct sk_buff *cpmac_get_skb(struct net_device *dev)
376 {
377 struct sk_buff *skb;
378 struct cpmac_priv *priv = netdev_priv(dev);
379
380 skb = priv->skb_pool;
381 if (likely(skb)) {
382 priv->skb_pool = skb->next;
383 } else {
384 skb = dev_alloc_skb(CPMAC_SKB_SIZE + 2);
385 if (skb) {
386 skb->next = NULL;
387 skb_reserve(skb, 2);
388 skb->dev = priv->dev;
389 }
390 }
391
392 if (likely(priv->free_skbs))
393 priv->free_skbs--;
394
395 if (priv->free_skbs < CPMAC_LOW_THRESH)
396 schedule_work(&priv->alloc_work);
397
398 return skb;
399 }
400
401 static inline struct sk_buff *cpmac_rx_one(struct net_device *dev,
402 struct cpmac_priv *priv,
403 struct cpmac_desc *desc)
404 {
405 unsigned long flags;
406 char *data;
407 struct sk_buff *skb, *result = NULL;
408
409 priv->regs->rx_ack[0] = virt_to_phys(desc);
410 if (unlikely(!desc->datalen)) {
411 if (printk_ratelimit())
412 printk(KERN_WARNING "%s: rx: spurious interrupt\n",
413 dev->name);
414 priv->stats.rx_errors++;
415 return NULL;
416 }
417
418 spin_lock_irqsave(&priv->lock, flags);
419 skb = cpmac_get_skb(dev);
420 if (likely(skb)) {
421 data = (char *)phys_to_virt(desc->hw_data);
422 dma_cache_inv((u32)data, desc->datalen);
423 skb_put(desc->skb, desc->datalen);
424 desc->skb->protocol = eth_type_trans(desc->skb, dev);
425 desc->skb->ip_summed = CHECKSUM_NONE;
426 priv->stats.rx_packets++;
427 priv->stats.rx_bytes += desc->datalen;
428 result = desc->skb;
429 desc->skb = skb;
430 } else {
431 #ifdef CPMAC_DEBUG
432 if (printk_ratelimit())
433 printk("%s: low on skbs, dropping packet\n",
434 dev->name);
435 #endif
436 priv->stats.rx_dropped++;
437 }
438 spin_unlock_irqrestore(&priv->lock, flags);
439
440 desc->hw_data = virt_to_phys(desc->skb->data);
441 desc->buflen = CPMAC_SKB_SIZE;
442 desc->dataflags = CPMAC_OWN;
443 dma_cache_wback((u32)desc, 16);
444
445 return result;
446 }
447
448 static void cpmac_rx(struct net_device *dev)
449 {
450 struct sk_buff *skb;
451 struct cpmac_desc *desc;
452 struct cpmac_priv *priv = netdev_priv(dev);
453
454 spin_lock(&priv->lock);
455 if (unlikely(!priv->rx_head)) {
456 spin_unlock(&priv->lock);
457 return;
458 }
459
460 desc = priv->rx_head;
461 dma_cache_inv((u32)desc, 16);
462 #ifdef CPMAC_DEBUG
463 printk(KERN_DEBUG "%s: len=%d, %s\n", __func__, pkt->datalen,
464 cpmac_dump_buf(data, pkt->datalen));
465 #endif
466
467 while ((desc->dataflags & CPMAC_OWN) == 0) {
468 skb = cpmac_rx_one(dev, priv, desc);
469 if (likely(skb)) {
470 netif_rx(skb);
471 }
472 desc = desc->next;
473 dma_cache_inv((u32)desc, 16);
474 }
475
476 priv->rx_head = desc;
477 priv->regs->rx_ptr[0] = virt_to_phys(desc);
478 spin_unlock(&priv->lock);
479 }
480
481 static int cpmac_poll(struct net_device *dev, int *budget)
482 {
483 struct sk_buff *skb;
484 struct cpmac_desc *desc;
485 int received = 0, quota = min(dev->quota, *budget);
486 struct cpmac_priv *priv = netdev_priv(dev);
487
488 if (unlikely(!priv->rx_head)) {
489 if (printk_ratelimit())
490 printk(KERN_WARNING "%s: rx: polling, but no queue\n",
491 dev->name);
492 netif_rx_complete(dev);
493 return 0;
494 }
495
496 desc = priv->rx_head;
497 dma_cache_inv((u32)desc, 16);
498
499 while ((received < quota) && ((desc->dataflags & CPMAC_OWN) == 0)) {
500 skb = cpmac_rx_one(dev, priv, desc);
501 if (likely(skb)) {
502 netif_receive_skb(skb);
503 received++;
504 }
505 desc = desc->next;
506 priv->rx_head = desc;
507 dma_cache_inv((u32)desc, 16);
508 }
509
510 *budget -= received;
511 dev->quota -= received;
512 #ifdef CPMAC_DEBUG
513 printk("%s: processed %d packets\n", dev->name, received);
514 #endif
515 if (desc->dataflags & CPMAC_OWN) {
516 priv->regs->rx_ptr[0] = virt_to_phys(desc);
517 netif_rx_complete(dev);
518 priv->regs->rx_int.enable = 0x1;
519 priv->regs->rx_int.clear = 0xfe;
520 return 0;
521 }
522
523 return 1;
524 }
525
526 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
527 static void
528 cpmac_alloc_skbs(struct work_struct *work)
529 {
530 struct cpmac_priv *priv = container_of(work, struct cpmac_priv,
531 alloc_work);
532 #else
533 static void
534 cpmac_alloc_skbs(void *data)
535 {
536 struct net_device *dev = (struct net_device*)data;
537 struct cpmac_priv *priv = netdev_priv(dev);
538 #endif
539 unsigned long flags;
540 int i, num_skbs = 0;
541 struct sk_buff *skb, *skbs = NULL;
542
543 for (i = 0; i < CPMAC_ALLOC_SIZE; i++) {
544 skb = alloc_skb(CPMAC_SKB_SIZE + 2, GFP_KERNEL);
545 if (!skb)
546 break;
547 skb->next = skbs;
548 skb_reserve(skb, 2);
549 skb->dev = priv->dev;
550 num_skbs++;
551 skbs = skb;
552 }
553
554 if (skbs) {
555 spin_lock_irqsave(&priv->lock, flags);
556 for (skb = priv->skb_pool; skb && skb->next; skb = skb->next);
557 if (!skb) {
558 priv->skb_pool = skbs;
559 } else {
560 skb->next = skbs;
561 }
562 priv->free_skbs += num_skbs;
563 spin_unlock_irqrestore(&priv->lock, flags);
564 #ifdef CPMAC_DEBUG
565 printk("%s: allocated %d skbs\n", priv->dev->name, num_skbs);
566 #endif
567 }
568 }
569
570 static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
571 {
572 unsigned long flags;
573 int len, chan;
574 struct cpmac_desc *desc;
575 struct cpmac_priv *priv = netdev_priv(dev);
576
577 len = skb->len;
578 #ifdef CPMAC_DEBUG
579 printk(KERN_DEBUG "%s: len=%d\n", __func__, len); //cpmac_dump_buf(const uint8_t * buf, unsigned size)
580 #endif
581 if (unlikely(len < ETH_ZLEN)) {
582 if (unlikely(skb_padto(skb, ETH_ZLEN))) {
583 if (printk_ratelimit())
584 printk(KERN_NOTICE "%s: padding failed, dropping\n",
585 dev->name);
586 spin_lock_irqsave(&priv->lock, flags);
587 priv->stats.tx_dropped++;
588 spin_unlock_irqrestore(&priv->lock, flags);
589 return -ENOMEM;
590 }
591 len = ETH_ZLEN;
592 }
593 spin_lock_irqsave(&priv->lock, flags);
594 chan = priv->tx_tail++;
595 priv->tx_tail %= 8;
596 if (priv->tx_tail == priv->tx_head)
597 netif_stop_queue(dev);
598
599 desc = &priv->desc_ring[chan];
600 dma_cache_inv((u32)desc, 16);
601 if (desc->dataflags & CPMAC_OWN) {
602 printk(KERN_NOTICE "%s: tx dma ring full, dropping\n", dev->name);
603 priv->stats.tx_dropped++;
604 spin_unlock_irqrestore(&priv->lock, flags);
605 return -ENOMEM;
606 }
607
608 dev->trans_start = jiffies;
609 desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN;
610 desc->skb = skb;
611 desc->hw_data = virt_to_phys(skb->data);
612 dma_cache_wback((u32)skb->data, len);
613 desc->buflen = len;
614 desc->datalen = len;
615 desc->hw_next = 0;
616 dma_cache_wback((u32)desc, 16);
617 priv->regs->tx_ptr[chan] = virt_to_phys(desc);
618 spin_unlock_irqrestore(&priv->lock, flags);
619
620 return 0;
621 }
622
623 static void cpmac_end_xmit(struct net_device *dev, int channel)
624 {
625 struct cpmac_desc *desc;
626 struct cpmac_priv *priv = netdev_priv(dev);
627
628 spin_lock(&priv->lock);
629 desc = &priv->desc_ring[channel];
630 priv->regs->tx_ack[channel] = virt_to_phys(desc);
631 if (likely(desc->skb)) {
632 priv->stats.tx_packets++;
633 priv->stats.tx_bytes += desc->skb->len;
634 dev_kfree_skb_irq(desc->skb);
635 if (netif_queue_stopped(dev))
636 netif_wake_queue(dev);
637 } else {
638 if (printk_ratelimit())
639 printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n",
640 dev->name);
641 }
642 spin_unlock(&priv->lock);
643 }
644
645 static void cpmac_reset(struct net_device *dev)
646 {
647 int i;
648 struct cpmac_priv *priv = netdev_priv(dev);
649
650 ar7_device_reset(priv->config->reset_bit);
651 priv->regs->rx_ctrl.control &= ~1;
652 priv->regs->tx_ctrl.control &= ~1;
653 for (i = 0; i < 8; i++) {
654 priv->regs->tx_ptr[i] = 0;
655 priv->regs->rx_ptr[i] = 0;
656 }
657 priv->regs->mac_control &= ~MAC_MII; /* disable mii */
658 }
659
660 static inline void cpmac_free_rx_ring(struct net_device *dev)
661 {
662 struct cpmac_desc *desc;
663 int i;
664 struct cpmac_priv *priv = netdev_priv(dev);
665
666 if (unlikely(!priv->rx_head))
667 return;
668
669 desc = priv->rx_head;
670 dma_cache_inv((u32)desc, 16);
671
672 for (i = 0; i < rx_ring_size; i++) {
673 desc->buflen = CPMAC_SKB_SIZE;
674 if ((desc->dataflags & CPMAC_OWN) == 0) {
675 desc->dataflags = CPMAC_OWN;
676 priv->stats.rx_dropped++;
677 }
678 dma_cache_wback((u32)desc, 16);
679 desc = desc->next;
680 dma_cache_inv((u32)desc, 16);
681 }
682 }
683
684 static irqreturn_t cpmac_irq(int irq, void *dev_id)
685 {
686 struct net_device *dev = (struct net_device *)dev_id;
687 struct cpmac_priv *priv = netdev_priv(dev);
688 u32 status;
689
690 if (!dev)
691 return IRQ_NONE;
692
693 status = priv->regs->mac_int_vector;
694
695 if (status & INTST_TX) {
696 cpmac_end_xmit(dev, (status & 7));
697 }
698
699 if (status & INTST_RX) {
700 if (disable_napi) {
701 cpmac_rx(dev);
702 } else {
703 priv->regs->rx_int.enable = 0;
704 priv->regs->rx_int.clear = 0xff;
705 netif_rx_schedule(dev);
706 }
707 }
708
709 priv->regs->mac_eoi_vector = 0;
710
711 if (unlikely(status & (INTST_HOST | INTST_STATUS))) {
712 if (printk_ratelimit()) {
713 printk(KERN_ERR "%s: hw error, resetting...\n", dev->name);
714 }
715 spin_lock(&priv->lock);
716 phy_stop(priv->phy);
717 cpmac_reset(dev);
718 cpmac_free_rx_ring(dev);
719 cpmac_hw_init(dev);
720 spin_unlock(&priv->lock);
721 }
722
723 return IRQ_HANDLED;
724 }
725
726 static void cpmac_tx_timeout(struct net_device *dev)
727 {
728 struct cpmac_priv *priv = netdev_priv(dev);
729 struct cpmac_desc *desc;
730
731 priv->stats.tx_errors++;
732 desc = &priv->desc_ring[priv->tx_head++];
733 priv->tx_head %= 8;
734 printk("%s: transmit timeout\n", dev->name);
735 if (desc->skb)
736 dev_kfree_skb(desc->skb);
737 netif_wake_queue(dev);
738 }
739
740 static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
741 {
742 struct cpmac_priv *priv = netdev_priv(dev);
743 if (!(netif_running(dev)))
744 return -EINVAL;
745 if (!priv->phy)
746 return -EINVAL;
747 if ((cmd == SIOCGMIIPHY) || (cmd == SIOCGMIIREG) ||
748 (cmd == SIOCSMIIREG))
749 return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
750
751 return -EINVAL;
752 }
753
754 static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
755 {
756 struct cpmac_priv *priv = netdev_priv(dev);
757
758 if (priv->phy)
759 return phy_ethtool_gset(priv->phy, cmd);
760
761 return -EINVAL;
762 }
763
764 static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
765 {
766 struct cpmac_priv *priv = netdev_priv(dev);
767
768 if (!capable(CAP_NET_ADMIN))
769 return -EPERM;
770
771 if (priv->phy)
772 return phy_ethtool_sset(priv->phy, cmd);
773
774 return -EINVAL;
775 }
776
777 static void cpmac_get_drvinfo(struct net_device *dev,
778 struct ethtool_drvinfo *info)
779 {
780 strcpy(info->driver, "cpmac");
781 strcpy(info->version, "0.0.3");
782 info->fw_version[0] = '\0';
783 sprintf(info->bus_info, "%s", "cpmac");
784 info->regdump_len = 0;
785 }
786
787 static const struct ethtool_ops cpmac_ethtool_ops = {
788 .get_settings = cpmac_get_settings,
789 .set_settings = cpmac_set_settings,
790 .get_drvinfo = cpmac_get_drvinfo,
791 .get_link = ethtool_op_get_link,
792 };
793
794 static struct net_device_stats *cpmac_stats(struct net_device *dev)
795 {
796 struct cpmac_priv *priv = netdev_priv(dev);
797
798 if (netif_device_present(dev))
799 return &priv->stats;
800
801 return NULL;
802 }
803
804 static int cpmac_change_mtu(struct net_device *dev, int mtu)
805 {
806 unsigned long flags;
807 struct cpmac_priv *priv = netdev_priv(dev);
808 spinlock_t *lock = &priv->lock;
809
810 if ((mtu < 68) || (mtu > 1500))
811 return -EINVAL;
812
813 spin_lock_irqsave(lock, flags);
814 dev->mtu = mtu;
815 spin_unlock_irqrestore(lock, flags);
816
817 return 0;
818 }
819
820 static void cpmac_adjust_link(struct net_device *dev)
821 {
822 struct cpmac_priv *priv = netdev_priv(dev);
823 unsigned long flags;
824 int new_state = 0;
825
826 spin_lock_irqsave(&priv->lock, flags);
827 if (priv->phy->link) {
828 if (priv->phy->duplex != priv->oldduplex) {
829 new_state = 1;
830 priv->oldduplex = priv->phy->duplex;
831 }
832
833 if (priv->phy->speed != priv->oldspeed) {
834 new_state = 1;
835 priv->oldspeed = priv->phy->speed;
836 }
837
838 if (!priv->oldlink) {
839 new_state = 1;
840 priv->oldlink = 1;
841 netif_schedule(dev);
842 }
843 } else if (priv->oldlink) {
844 new_state = 1;
845 priv->oldlink = 0;
846 priv->oldspeed = 0;
847 priv->oldduplex = -1;
848 }
849
850 if (new_state)
851 phy_print_status(priv->phy);
852
853 spin_unlock_irqrestore(&priv->lock, flags);
854 }
855
856 static void cpmac_hw_init(struct net_device *dev)
857 {
858 int i;
859 struct cpmac_priv *priv = netdev_priv(dev);
860
861 for (i = 0; i < 8; i++)
862 priv->regs->tx_ptr[i] = 0;
863 priv->regs->rx_ptr[0] = virt_to_phys(priv->rx_head);
864
865 priv->regs->mbp = MBP_RXSHORT | MBP_RXBCAST | MBP_RXMCAST;
866 priv->regs->unicast_enable = 0x1;
867 priv->regs->unicast_clear = 0xfe;
868 priv->regs->buffer_offset = 0;
869 for (i = 0; i < 8; i++)
870 priv->regs->mac_addr_low[i] = dev->dev_addr[5];
871 priv->regs->mac_addr_mid = dev->dev_addr[4];
872 priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8)
873 | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
874 priv->regs->max_len = CPMAC_SKB_SIZE;
875 priv->regs->rx_int.enable = 0x1;
876 priv->regs->rx_int.clear = 0xfe;
877 priv->regs->tx_int.enable = 0xff;
878 priv->regs->tx_int.clear = 0;
879 priv->regs->mac_int_enable = 3;
880 priv->regs->mac_int_clear = 0xfc;
881
882 priv->regs->rx_ctrl.control |= 1;
883 priv->regs->tx_ctrl.control |= 1;
884 priv->regs->mac_control |= MAC_MII | MAC_FDX;
885
886 priv->phy->state = PHY_CHANGELINK;
887 phy_start(priv->phy);
888 }
889
890 static int cpmac_open(struct net_device *dev)
891 {
892 int i, size, res;
893 struct cpmac_priv *priv = netdev_priv(dev);
894 struct cpmac_desc *desc;
895 struct sk_buff *skb;
896
897 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
898 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
899 0, PHY_INTERFACE_MODE_MII);
900 #else
901 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0);
902 #endif
903 if (IS_ERR(priv->phy)) {
904 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
905 return PTR_ERR(priv->phy);
906 }
907
908 if (!request_mem_region(dev->mem_start, dev->mem_end -
909 dev->mem_start, dev->name)) {
910 printk("%s: failed to request registers\n",
911 dev->name);
912 res = -ENXIO;
913 goto fail_reserve;
914 }
915
916 priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end -
917 dev->mem_start);
918 if (!priv->regs) {
919 printk("%s: failed to remap registers\n", dev->name);
920 res = -ENXIO;
921 goto fail_remap;
922 }
923
924 priv->rx_head = NULL;
925 size = sizeof(struct cpmac_desc) * (rx_ring_size +
926 CPMAC_TX_RING_SIZE);
927 priv->desc_ring = (struct cpmac_desc *)kmalloc(size, GFP_KERNEL);
928 if (!priv->desc_ring) {
929 res = -ENOMEM;
930 goto fail_alloc;
931 }
932
933 memset((char *)priv->desc_ring, 0, size);
934
935 priv->skb_pool = NULL;
936 priv->free_skbs = 0;
937 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
938
939 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
940 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs);
941 #else
942 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs, dev);
943 #endif
944 schedule_work(&priv->alloc_work);
945 flush_scheduled_work();
946
947 for (i = 0; i < rx_ring_size; i++) {
948 desc = &priv->rx_head[i];
949 skb = cpmac_get_skb(dev);
950 if (!skb) {
951 res = -ENOMEM;
952 goto fail_desc;
953 }
954 desc->skb = skb;
955 desc->hw_data = virt_to_phys(skb->data);
956 desc->buflen = CPMAC_SKB_SIZE;
957 desc->dataflags = CPMAC_OWN;
958 desc->next = &priv->rx_head[(i + 1) % rx_ring_size];
959 desc->hw_next = virt_to_phys(desc->next);
960 dma_cache_wback((u32)desc, 16);
961 }
962
963 if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT,
964 dev->name, dev))) {
965 printk("%s: failed to obtain irq\n", dev->name);
966 goto fail_irq;
967 }
968
969 cpmac_reset(dev);
970 cpmac_hw_init(dev);
971
972 netif_start_queue(dev);
973 return 0;
974
975 fail_irq:
976 fail_desc:
977 for (i = 0; i < rx_ring_size; i++)
978 if (priv->rx_head[i].skb)
979 kfree_skb(priv->rx_head[i].skb);
980 fail_alloc:
981 kfree(priv->desc_ring);
982
983 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
984 priv->skb_pool = skb->next;
985 kfree_skb(skb);
986 }
987
988 iounmap(priv->regs);
989
990 fail_remap:
991 release_mem_region(dev->mem_start, dev->mem_end -
992 dev->mem_start);
993
994 fail_reserve:
995 phy_disconnect(priv->phy);
996
997 return res;
998 }
999
1000 static int cpmac_stop(struct net_device *dev)
1001 {
1002 int i;
1003 struct sk_buff *skb;
1004 struct cpmac_priv *priv = netdev_priv(dev);
1005
1006 netif_stop_queue(dev);
1007
1008 phy_stop(priv->phy);
1009 phy_disconnect(priv->phy);
1010 priv->phy = NULL;
1011
1012 cpmac_reset(dev);
1013
1014 for (i = 0; i < 8; i++) {
1015 priv->regs->rx_ptr[i] = 0;
1016 priv->regs->tx_ptr[i] = 0;
1017 priv->regs->mbp = 0;
1018 }
1019
1020 free_irq(dev->irq, dev);
1021 release_mem_region(dev->mem_start, dev->mem_end -
1022 dev->mem_start);
1023
1024 cancel_delayed_work(&priv->alloc_work);
1025 flush_scheduled_work();
1026
1027 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
1028 for (i = 0; i < rx_ring_size; i++)
1029 if (priv->rx_head[i].skb)
1030 kfree_skb(priv->rx_head[i].skb);
1031
1032 kfree(priv->desc_ring);
1033
1034 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
1035 priv->skb_pool = skb->next;
1036 kfree_skb(skb);
1037 }
1038
1039 return 0;
1040 }
1041
1042 static int external_switch = 0;
1043
1044 static int __devinit cpmac_probe(struct platform_device *pdev)
1045 {
1046 int i, rc, phy_id;
1047 struct resource *res;
1048 struct cpmac_priv *priv;
1049 struct net_device *dev;
1050 struct plat_cpmac_data *pdata;
1051
1052 if (strcmp(pdev->name, "cpmac") != 0)
1053 return -ENODEV;
1054
1055 pdata = pdev->dev.platform_data;
1056
1057 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1058 if (!(pdata->phy_mask & (1 << phy_id)))
1059 continue;
1060 if (!cpmac_mii.phy_map[phy_id])
1061 continue;
1062 break;
1063 }
1064
1065 if (phy_id == PHY_MAX_ADDR) {
1066 if (external_switch) {
1067 phy_id = 0;
1068 } else {
1069 printk("cpmac: no PHY present\n");
1070 return -ENODEV;
1071 }
1072 }
1073
1074 dev = alloc_etherdev(sizeof(struct cpmac_priv));
1075
1076 if (!dev) {
1077 printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n");
1078 return -ENOMEM;
1079 }
1080
1081 SET_MODULE_OWNER(dev);
1082 platform_set_drvdata(pdev, dev);
1083 priv = netdev_priv(dev);
1084
1085 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
1086 if (!res) {
1087 rc = -ENODEV;
1088 goto fail;
1089 }
1090
1091 dev->mem_start = res->start;
1092 dev->mem_end = res->end;
1093 dev->irq = platform_get_irq_byname(pdev, "irq");
1094
1095 dev->mtu = 1500;
1096 dev->open = cpmac_open;
1097 dev->stop = cpmac_stop;
1098 dev->set_config = cpmac_config;
1099 dev->hard_start_xmit = cpmac_start_xmit;
1100 dev->do_ioctl = cpmac_ioctl;
1101 dev->get_stats = cpmac_stats;
1102 dev->change_mtu = cpmac_change_mtu;
1103 dev->set_mac_address = cpmac_set_mac_address;
1104 dev->set_multicast_list = cpmac_set_multicast_list;
1105 dev->tx_timeout = cpmac_tx_timeout;
1106 dev->ethtool_ops = &cpmac_ethtool_ops;
1107 if (!disable_napi) {
1108 dev->poll = cpmac_poll;
1109 dev->weight = min(rx_ring_size, 64);
1110 }
1111
1112 memset(priv, 0, sizeof(struct cpmac_priv));
1113 spin_lock_init(&priv->lock);
1114 priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
1115 priv->config = pdata;
1116 priv->dev = dev;
1117 memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr));
1118 if (phy_id == 31) {
1119 snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
1120 cpmac_mii.id, phy_id);
1121 } else {
1122 snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
1123 }
1124
1125 if ((rc = register_netdev(dev))) {
1126 printk("cpmac: error %i registering device %s\n",
1127 rc, dev->name);
1128 goto fail;
1129 }
1130
1131 printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
1132 dev->name, (u32 *)dev->mem_start, dev->irq,
1133 priv->phy_name);
1134 for (i = 0; i < 6; i++) {
1135 printk("%02x", dev->dev_addr[i]);
1136 if (i < 5) printk(":");
1137 else printk(")\n");
1138 }
1139
1140 return 0;
1141
1142 fail:
1143 free_netdev(dev);
1144 return rc;
1145 }
1146
1147 static int __devexit cpmac_remove(struct platform_device *pdev)
1148 {
1149 struct net_device *dev = platform_get_drvdata(pdev);
1150 unregister_netdev(dev);
1151 free_netdev(dev);
1152 return 0;
1153 }
1154
1155 static struct platform_driver cpmac_driver = {
1156 .driver.name = "cpmac",
1157 .probe = cpmac_probe,
1158 .remove = cpmac_remove,
1159 };
1160
1161 int __devinit cpmac_init(void)
1162 {
1163 volatile u32 mask;
1164 int i, res;
1165 cpmac_mii.priv = (struct cpmac_mdio_regs *)
1166 ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs));
1167
1168 if (!cpmac_mii.priv) {
1169 printk("Can't ioremap mdio registers\n");
1170 return -ENXIO;
1171 }
1172
1173 #warning FIXME: unhardcode gpio&reset bits
1174 ar7_gpio_disable(26);
1175 ar7_gpio_disable(27);
1176 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
1177 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
1178 ar7_device_reset(AR7_RESET_BIT_EPHY);
1179
1180 cpmac_mii.reset(&cpmac_mii);
1181
1182 for (i = 0; i < 300000; i++) {
1183 mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive;
1184 if (mask)
1185 break;
1186 }
1187
1188 mask &= 0x7fffffff;
1189 if (mask & (mask - 1)) {
1190 external_switch = 1;
1191 mask = 0;
1192 }
1193
1194 cpmac_mii.phy_mask = ~(mask | 0x80000000);
1195
1196 res = mdiobus_register(&cpmac_mii);
1197 if (res)
1198 goto fail_mii;
1199
1200 res = platform_driver_register(&cpmac_driver);
1201 if (res)
1202 goto fail_cpmac;
1203
1204 return 0;
1205
1206 fail_cpmac:
1207 mdiobus_unregister(&cpmac_mii);
1208
1209 fail_mii:
1210 iounmap(cpmac_mii.priv);
1211
1212 return res;
1213 }
1214
1215 void __devexit cpmac_exit(void)
1216 {
1217 platform_driver_unregister(&cpmac_driver);
1218 mdiobus_unregister(&cpmac_mii);
1219 }
1220
1221 module_init(cpmac_init);
1222 module_exit(cpmac_exit);
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