2 * Atheros AR71xx SoC platform devices
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
21 #include <asm/mips_machine.h>
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
25 static u8 ar71xx_mac_base
[ETH_ALEN
] __initdata
;
28 * OHCI (USB full speed host controller)
30 static struct resource ar71xx_ohci_resources
[] = {
32 .start
= AR71XX_OHCI_BASE
,
33 .end
= AR71XX_OHCI_BASE
+ AR71XX_OHCI_SIZE
- 1,
34 .flags
= IORESOURCE_MEM
,
37 .start
= AR71XX_MISC_IRQ_OHCI
,
38 .end
= AR71XX_MISC_IRQ_OHCI
,
39 .flags
= IORESOURCE_IRQ
,
43 static u64 ar71xx_ohci_dmamask
= DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_ohci_device
= {
45 .name
= "ar71xx-ohci",
47 .resource
= ar71xx_ohci_resources
,
48 .num_resources
= ARRAY_SIZE(ar71xx_ohci_resources
),
50 .dma_mask
= &ar71xx_ohci_dmamask
,
51 .coherent_dma_mask
= DMA_BIT_MASK(32),
56 * EHCI (USB full speed host controller)
58 static struct resource ar71xx_ehci_resources
[] = {
60 .start
= AR71XX_EHCI_BASE
,
61 .end
= AR71XX_EHCI_BASE
+ AR71XX_EHCI_SIZE
- 1,
62 .flags
= IORESOURCE_MEM
,
65 .start
= AR71XX_CPU_IRQ_USB
,
66 .end
= AR71XX_CPU_IRQ_USB
,
67 .flags
= IORESOURCE_IRQ
,
72 static u64 ar71xx_ehci_dmamask
= DMA_BIT_MASK(32);
73 static struct ar71xx_ehci_platform_data ar71xx_ehci_data
;
75 static struct platform_device ar71xx_ehci_device
= {
76 .name
= "ar71xx-ehci",
78 .resource
= ar71xx_ehci_resources
,
79 .num_resources
= ARRAY_SIZE(ar71xx_ehci_resources
),
81 .dma_mask
= &ar71xx_ehci_dmamask
,
82 .coherent_dma_mask
= DMA_BIT_MASK(32),
83 .platform_data
= &ar71xx_ehci_data
,
87 #define AR71XX_USB_RESET_MASK \
88 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
89 | RESET_MODULE_USB_OHCI_DLL)
91 static void ar71xx_usb_setup(void)
93 ar71xx_device_stop(AR71XX_USB_RESET_MASK
);
95 ar71xx_device_start(AR71XX_USB_RESET_MASK
);
97 /* Turning on the Buff and Desc swap bits */
98 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG
, 0xf0000);
100 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
101 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ
, 0x20c00);
106 void __init
ar71xx_add_device_usb(void)
108 switch (ar71xx_soc
) {
109 case AR71XX_SOC_AR7130
:
110 case AR71XX_SOC_AR7141
:
111 case AR71XX_SOC_AR7161
:
113 platform_device_register(&ar71xx_ohci_device
);
114 platform_device_register(&ar71xx_ehci_device
);
117 case AR71XX_SOC_AR9130
:
118 case AR71XX_SOC_AR9132
:
119 ar71xx_ehci_data
.is_ar91xx
= 1;
120 platform_device_register(&ar71xx_ehci_device
);
128 #ifdef CONFIG_AR71XX_EARLY_SERIAL
129 static void __init
ar71xx_add_device_uart(void) {};
131 static struct resource ar71xx_uart_resources
[] = {
133 .start
= AR71XX_UART_BASE
,
134 .end
= AR71XX_UART_BASE
+ AR71XX_UART_SIZE
- 1,
135 .flags
= IORESOURCE_MEM
,
139 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
140 static struct plat_serial8250_port ar71xx_uart_data
[] = {
142 .mapbase
= AR71XX_UART_BASE
,
143 .irq
= AR71XX_MISC_IRQ_UART
,
144 .flags
= AR71XX_UART_FLAGS
,
145 .iotype
= UPIO_MEM32
,
148 /* terminating entry */
152 static struct platform_device ar71xx_uart_device
= {
153 .name
= "serial8250",
154 .id
= PLAT8250_DEV_PLATFORM
,
155 .resource
= ar71xx_uart_resources
,
156 .num_resources
= ARRAY_SIZE(ar71xx_uart_resources
),
158 .platform_data
= ar71xx_uart_data
162 static void __init
ar71xx_add_device_uart(void)
164 ar71xx_uart_data
[0].uartclk
= ar71xx_ahb_freq
;
165 platform_device_register(&ar71xx_uart_device
);
167 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
169 static struct resource ar71xx_mdio_resources
[] = {
172 .flags
= IORESOURCE_MEM
,
173 .start
= AR71XX_GE0_BASE
+ 0x20,
174 .end
= AR71XX_GE0_BASE
+ 0x38 - 1,
178 static struct ag71xx_mdio_platform_data ar71xx_mdio_data
= {
179 .phy_mask
= 0xffffffff,
182 static struct platform_device ar71xx_mdio_device
= {
183 .name
= "ag71xx-mdio",
185 .resource
= ar71xx_mdio_resources
,
186 .num_resources
= ARRAY_SIZE(ar71xx_mdio_resources
),
188 .platform_data
= &ar71xx_mdio_data
,
192 void __init
ar71xx_add_device_mdio(u32 phy_mask
)
194 ar71xx_mdio_data
.phy_mask
= phy_mask
;
195 platform_device_register(&ar71xx_mdio_device
);
198 static void ar71xx_set_pll(u32 cfg_reg
, u32 pll_reg
, u32 pll_val
, u32 shift
)
203 base
= ioremap_nocache(AR71XX_PLL_BASE
, AR71XX_PLL_SIZE
);
205 t
= __raw_readl(base
+ cfg_reg
);
208 __raw_writel(t
, base
+ cfg_reg
);
211 __raw_writel(pll_val
, base
+ pll_reg
);
214 __raw_writel(t
, base
+ cfg_reg
);
218 __raw_writel(t
, base
+ cfg_reg
);
221 printk(KERN_DEBUG
"ar71xx: pll_reg %#x: %#x\n",
222 (unsigned int)(base
+ pll_reg
), __raw_readl(base
+ pll_reg
));
227 static void ar71xx_set_pll_ge0(u32 val
)
229 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG
, AR71XX_PLL_REG_ETH0_INT_CLOCK
,
230 val
, AR71XX_ETH0_PLL_SHIFT
);
233 static void ar71xx_set_pll_ge1(u32 val
)
235 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG
, AR71XX_PLL_REG_ETH1_INT_CLOCK
,
236 val
, AR71XX_ETH1_PLL_SHIFT
);
239 static void ar91xx_set_pll_ge0(u32 val
)
241 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG
, AR91XX_PLL_REG_ETH0_INT_CLOCK
,
242 val
, AR91XX_ETH0_PLL_SHIFT
);
245 static void ar91xx_set_pll_ge1(u32 val
)
247 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG
, AR91XX_PLL_REG_ETH1_INT_CLOCK
,
248 val
, AR91XX_ETH1_PLL_SHIFT
);
251 static void ar71xx_ddr_flush_ge0(void)
253 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0
);
256 static void ar71xx_ddr_flush_ge1(void)
258 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1
);
261 static void ar91xx_ddr_flush_ge0(void)
263 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0
);
266 static void ar91xx_ddr_flush_ge1(void)
268 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1
);
271 static struct resource ar71xx_eth0_resources
[] = {
274 .flags
= IORESOURCE_MEM
,
275 .start
= AR71XX_GE0_BASE
,
276 .end
= AR71XX_GE0_BASE
+ 0x20 - 1,
279 .flags
= IORESOURCE_MEM
,
280 .start
= AR71XX_GE0_BASE
+ 0x38,
281 .end
= AR71XX_GE0_BASE
+ 0x200 - 1,
284 .flags
= IORESOURCE_MEM
,
285 .start
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
,
286 .end
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
+ 3,
289 .flags
= IORESOURCE_IRQ
,
290 .start
= AR71XX_CPU_IRQ_GE0
,
291 .end
= AR71XX_CPU_IRQ_GE0
,
295 struct ag71xx_platform_data ar71xx_eth0_data
= {
296 .reset_bit
= RESET_MODULE_GE0_MAC
,
299 static struct platform_device ar71xx_eth0_device
= {
302 .resource
= ar71xx_eth0_resources
,
303 .num_resources
= ARRAY_SIZE(ar71xx_eth0_resources
),
305 .platform_data
= &ar71xx_eth0_data
,
309 static struct resource ar71xx_eth1_resources
[] = {
312 .flags
= IORESOURCE_MEM
,
313 .start
= AR71XX_GE1_BASE
,
314 .end
= AR71XX_GE1_BASE
+ 0x20 - 1,
317 .flags
= IORESOURCE_MEM
,
318 .start
= AR71XX_GE1_BASE
+ 0x38,
319 .end
= AR71XX_GE1_BASE
+ 0x200 - 1,
322 .flags
= IORESOURCE_MEM
,
323 .start
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
,
324 .end
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
+ 3,
327 .flags
= IORESOURCE_IRQ
,
328 .start
= AR71XX_CPU_IRQ_GE1
,
329 .end
= AR71XX_CPU_IRQ_GE1
,
333 struct ag71xx_platform_data ar71xx_eth1_data
= {
334 .reset_bit
= RESET_MODULE_GE1_MAC
,
337 static struct platform_device ar71xx_eth1_device
= {
340 .resource
= ar71xx_eth1_resources
,
341 .num_resources
= ARRAY_SIZE(ar71xx_eth1_resources
),
343 .platform_data
= &ar71xx_eth1_data
,
347 static int ar71xx_eth_instance __initdata
;
348 void __init
ar71xx_add_device_eth(unsigned int id
)
350 struct platform_device
*pdev
;
351 struct ag71xx_platform_data
*pdata
;
355 switch (ar71xx_eth0_data
.phy_if_mode
) {
356 case PHY_INTERFACE_MODE_MII
:
357 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_MII
;
359 case PHY_INTERFACE_MODE_GMII
:
360 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_GMII
;
362 case PHY_INTERFACE_MODE_RGMII
:
363 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RGMII
;
365 case PHY_INTERFACE_MODE_RMII
:
366 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RMII
;
369 printk(KERN_ERR
"ar71xx: invalid PHY interface mode "
373 pdev
= &ar71xx_eth0_device
;
376 switch (ar71xx_eth1_data
.phy_if_mode
) {
377 case PHY_INTERFACE_MODE_RMII
:
378 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RMII
;
380 case PHY_INTERFACE_MODE_RGMII
:
381 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RGMII
;
384 printk(KERN_ERR
"ar71xx: invalid PHY interface mode "
388 pdev
= &ar71xx_eth1_device
;
391 printk(KERN_ERR
"ar71xx: invalid ethernet id %d\n", id
);
395 pdata
= pdev
->dev
.platform_data
;
397 switch (ar71xx_soc
) {
398 case AR71XX_SOC_AR7130
:
399 pdata
->ddr_flush
= id
? ar71xx_ddr_flush_ge1
400 : ar71xx_ddr_flush_ge0
;
401 pdata
->set_pll
= id
? ar71xx_set_pll_ge1
402 : ar71xx_set_pll_ge0
;
405 case AR71XX_SOC_AR7141
:
406 case AR71XX_SOC_AR7161
:
407 pdata
->ddr_flush
= id
? ar71xx_ddr_flush_ge1
408 : ar71xx_ddr_flush_ge0
;
409 pdata
->set_pll
= id
? ar71xx_set_pll_ge1
410 : ar71xx_set_pll_ge0
;
414 case AR71XX_SOC_AR9130
:
415 pdata
->ddr_flush
= id
? ar91xx_ddr_flush_ge1
416 : ar91xx_ddr_flush_ge0
;
417 pdata
->set_pll
= id
? ar91xx_set_pll_ge1
418 : ar91xx_set_pll_ge0
;
419 pdata
->is_ar91xx
= 1;
422 case AR71XX_SOC_AR9132
:
423 pdata
->ddr_flush
= id
? ar91xx_ddr_flush_ge1
424 : ar91xx_ddr_flush_ge0
;
425 pdata
->set_pll
= id
? ar91xx_set_pll_ge1
426 : ar91xx_set_pll_ge0
;
427 pdata
->is_ar91xx
= 1;
435 switch (pdata
->phy_if_mode
) {
436 case PHY_INTERFACE_MODE_GMII
:
437 case PHY_INTERFACE_MODE_RGMII
:
438 if (!pdata
->has_gbit
) {
439 printk(KERN_ERR
"ar71xx: no gbit available on eth%d\n",
448 memcpy(pdata
->mac_addr
, ar71xx_mac_base
, ETH_ALEN
);
449 pdata
->mac_addr
[5] += ar71xx_eth_instance
;
451 platform_device_register(pdev
);
452 ar71xx_eth_instance
++;
455 static struct resource ar71xx_spi_resources
[] = {
457 .start
= AR71XX_SPI_BASE
,
458 .end
= AR71XX_SPI_BASE
+ AR71XX_SPI_SIZE
- 1,
459 .flags
= IORESOURCE_MEM
,
463 static struct platform_device ar71xx_spi_device
= {
464 .name
= "ar71xx-spi",
466 .resource
= ar71xx_spi_resources
,
467 .num_resources
= ARRAY_SIZE(ar71xx_spi_resources
),
470 void __init
ar71xx_add_device_spi(struct ar71xx_spi_platform_data
*pdata
,
471 struct spi_board_info
const *info
,
474 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN
);
476 spi_register_board_info(info
, n
);
477 ar71xx_spi_device
.dev
.platform_data
= pdata
;
478 platform_device_register(&ar71xx_spi_device
);
481 void __init
ar71xx_add_device_leds_gpio(int id
, unsigned num_leds
,
482 struct gpio_led
*leds
)
484 struct platform_device
*pdev
;
485 struct gpio_led_platform_data pdata
;
489 p
= kmalloc(num_leds
* sizeof(*p
), GFP_KERNEL
);
493 memcpy(p
, leds
, num_leds
* sizeof(*p
));
495 pdev
= platform_device_alloc("leds-gpio", id
);
499 memset(&pdata
, 0, sizeof(pdata
));
500 pdata
.num_leds
= num_leds
;
503 err
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
507 err
= platform_device_add(pdev
);
514 platform_device_put(pdev
);
520 void __init
ar71xx_add_device_gpio_buttons(int id
,
521 unsigned poll_interval
,
523 struct gpio_button
*buttons
)
525 struct platform_device
*pdev
;
526 struct gpio_buttons_platform_data pdata
;
527 struct gpio_button
*p
;
530 p
= kmalloc(nbuttons
* sizeof(*p
), GFP_KERNEL
);
534 memcpy(p
, buttons
, nbuttons
* sizeof(*p
));
536 pdev
= platform_device_alloc("gpio-buttons", id
);
538 goto err_free_buttons
;
540 memset(&pdata
, 0, sizeof(pdata
));
541 pdata
.poll_interval
= poll_interval
;
542 pdata
.nbuttons
= nbuttons
;
545 err
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
550 err
= platform_device_add(pdev
);
557 platform_device_put(pdev
);
563 void __init
ar71xx_add_device_wdt(void)
565 platform_device_register_simple("ar71xx-wdt", -1, NULL
, 0);
568 void __init
ar71xx_set_mac_base(unsigned char *mac
)
570 memcpy(ar71xx_mac_base
, mac
, ETH_ALEN
);
573 void __init
ar71xx_parse_mac_addr(char *mac_str
)
578 t
= sscanf(mac_str
, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
579 &tmp
[0], &tmp
[1], &tmp
[2], &tmp
[3], &tmp
[4], &tmp
[5]);
582 ar71xx_set_mac_base(tmp
);
584 printk(KERN_DEBUG
"ar71xx: failed to parse mac address "
585 "\"%s\"\n", mac_str
);
588 static int __init
ar71xx_machine_setup(void)
592 ar71xx_add_device_uart();
593 ar71xx_add_device_wdt();
595 mips_machine_setup(ar71xx_mach_type
);
599 arch_initcall(ar71xx_machine_setup
);