2 * D-Link DIR-825 rev. B1 board support
4 * Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
6 * based on mach-wndr3700.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/input.h>
19 #include <linux/pci.h>
20 #include <linux/ath9k_platform.h>
21 #include <linux/delay.h>
23 #include <asm/mips_machine.h>
24 #include <asm/mach-ar71xx/ar71xx.h>
25 #include <asm/mach-ar71xx/pci.h>
29 #define DIR825B1_GPIO_LED_BLUE_USB 0
30 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
31 #define DIR825B1_GPIO_LED_BLUE_POWER 2
32 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE 4
33 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
34 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
36 #define DIR825B1_GPIO_BTN_RESET 3
37 #define DIR825B1_GPIO_BTN_POWERSAVE 8
39 #define DIR825B1_BUTTONS_POLL_INTERVAL 20
41 #define DIR825B1_CAL_LOCATION_0 0x1f661000
42 #define DIR825B1_CAL_LOCATION_1 0x1f665000
44 #define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
45 #define DIR825B1_MAC_LOCATION_1 0x2ffa8370
47 static struct ath9k_platform_data dir825b1_wmac0_data
;
48 static struct ath9k_platform_data dir825b1_wmac1_data
;
49 static char dir825b1_wmac0_mac
[6];
50 static char dir825b1_wmac1_mac
[6];
52 #ifdef CONFIG_MTD_PARTITIONS
53 static struct mtd_partition dir825b1_partitions
[] = {
58 .mask_flags
= MTD_WRITEABLE
,
63 .mask_flags
= MTD_WRITEABLE
,
72 .mask_flags
= MTD_WRITEABLE
,
75 #endif /* CONFIG_MTD_PARTITIONS */
77 static struct flash_platform_data dir825b1_flash_data
= {
78 #ifdef CONFIG_MTD_PARTITIONS
79 .parts
= dir825b1_partitions
,
80 .nr_parts
= ARRAY_SIZE(dir825b1_partitions
),
84 static struct spi_board_info dir825b1_spi_info
[] = {
88 .max_speed_hz
= 25000000,
90 .platform_data
= &dir825b1_flash_data
,
94 static struct gpio_led dir825b1_leds_gpio
[] __initdata
= {
96 .name
= "dir825b1:blue:usb",
97 .gpio
= DIR825B1_GPIO_LED_BLUE_USB
,
100 .name
= "dir825b1:orange:power",
101 .gpio
= DIR825B1_GPIO_LED_ORANGE_POWER
,
104 .name
= "dir825b1:blue:power",
105 .gpio
= DIR825B1_GPIO_LED_BLUE_POWER
,
108 .name
= "dir825b1:blue:powersave",
109 .gpio
= DIR825B1_GPIO_LED_BLUE_POWERSAVE
,
112 .name
= "dir825b1:orange:planet",
113 .gpio
= DIR825B1_GPIO_LED_ORANGE_PLANET
,
116 .name
= "dir825b1:blue:planet",
117 .gpio
= DIR825B1_GPIO_LED_BLUE_PLANET
,
122 static struct gpio_button dir825b1_gpio_buttons
[] __initdata
= {
128 .gpio
= DIR825B1_GPIO_BTN_RESET
,
135 .gpio
= DIR825B1_GPIO_BTN_POWERSAVE
,
141 static struct ar71xx_pci_irq dir825b1_pci_irqs
[] __initdata
= {
145 .irq
= AR71XX_PCI_IRQ_DEV0
,
149 .irq
= AR71XX_PCI_IRQ_DEV1
,
153 static int dir825b1_pci_plat_dev_init(struct pci_dev
*dev
)
155 switch(PCI_SLOT(dev
->devfn
)) {
157 dev
->dev
.platform_data
= &dir825b1_wmac0_data
;
161 dev
->dev
.platform_data
= &dir825b1_wmac1_data
;
168 static void dir825b1_pci_fixup(struct pci_dev
*dev
)
176 if (ar71xx_mach
!= AR71XX_MACH_DIR_825_B1
)
179 dir825b1_pci_plat_dev_init(dev
);
180 cal_data
= dev
->dev
.platform_data
;
182 if (*cal_data
!= 0xa55a) {
183 printk(KERN_ERR
"PCI: no calibration data found for %s\n",
188 mem
= ioremap(AR71XX_PCI_MEM_BASE
, 0x10000);
190 printk(KERN_ERR
"PCI: ioremap error for device %s\n",
195 printk(KERN_INFO
"PCI: fixup device %s\n", pci_name(dev
));
197 pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, &bar0
);
199 /* Setup the PCI device to allow access to the internal registers */
200 pci_write_config_dword(dev
, PCI_BASE_ADDRESS_0
, AR71XX_PCI_MEM_BASE
);
201 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
202 cmd
|= PCI_COMMAND_MASTER
| PCI_COMMAND_MEMORY
;
203 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
205 /* set pointer to first reg address */
207 while (*cal_data
!= 0xffff) {
211 val
|= (*cal_data
++) << 16;
213 __raw_writel(val
, mem
+ reg
);
217 pci_read_config_dword(dev
, PCI_VENDOR_ID
, &val
);
218 dev
->vendor
= val
& 0xffff;
219 dev
->device
= (val
>> 16) & 0xffff;
221 pci_read_config_dword(dev
, PCI_CLASS_REVISION
, &val
);
222 dev
->revision
= val
& 0xff;
223 dev
->class = val
>> 8; /* upper 3 bytes */
225 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
226 cmd
&= ~(PCI_COMMAND_MASTER
| PCI_COMMAND_MEMORY
);
227 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
229 pci_write_config_dword(dev
, PCI_BASE_ADDRESS_0
, bar0
);
233 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS
, PCI_ANY_ID
,
236 static void __init
dir825b1_pci_init(void)
238 memcpy(dir825b1_wmac0_data
.eeprom_data
,
239 (u8
*) KSEG1ADDR(DIR825B1_CAL_LOCATION_0
),
240 sizeof(dir825b1_wmac0_data
.eeprom_data
));
242 memcpy(dir825b1_wmac1_data
.eeprom_data
,
243 (u8
*) KSEG1ADDR(DIR825B1_CAL_LOCATION_1
),
244 sizeof(dir825b1_wmac1_data
.eeprom_data
));
246 memcpy(dir825b1_wmac0_mac
, (u8
*)KSEG1ADDR(DIR825B1_MAC_LOCATION_0
), 6);
247 dir825b1_wmac0_data
.macaddr
= dir825b1_wmac0_mac
;
248 memcpy(dir825b1_wmac1_mac
, (u8
*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1
), 6);
249 dir825b1_wmac1_data
.macaddr
= dir825b1_wmac1_mac
;
251 ar71xx_pci_plat_dev_init
= dir825b1_pci_plat_dev_init
;
252 ar71xx_pci_init(ARRAY_SIZE(dir825b1_pci_irqs
), dir825b1_pci_irqs
);
255 static void __init
dir825b1_pci_init(void) { }
256 #endif /* CONFIG_PCI */
258 static void __init
dir825b1_setup(void)
262 memcpy(mac
, (u8
*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1
), 6);
263 for(i
= 5; i
>= 3; i
--)
264 if(++mac
[i
] != 0x00) break;
266 ar71xx_set_mac_base(mac
);
268 ar71xx_add_device_mdio(0x0);
270 ar71xx_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
271 ar71xx_eth0_data
.phy_mask
= 0x1e;
272 ar71xx_eth0_data
.speed
= SPEED_1000
;
273 ar71xx_eth0_data
.duplex
= DUPLEX_FULL
;
274 ar71xx_eth0_pll_data
.pll_1000
= 0x11110000;
276 ar71xx_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
277 ar71xx_eth1_data
.phy_mask
= 0xc0;
278 ar71xx_eth1_data
.speed
= SPEED_1000
;
279 ar71xx_eth1_data
.duplex
= DUPLEX_FULL
;
280 ar71xx_eth1_pll_data
.pll_1000
= 0x11110000;
282 ar71xx_add_device_eth(0);
283 ar71xx_add_device_eth(1);
285 ar71xx_add_device_spi(NULL
, dir825b1_spi_info
,
286 ARRAY_SIZE(dir825b1_spi_info
));
288 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio
),
291 ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL
,
292 ARRAY_SIZE(dir825b1_gpio_buttons
),
293 dir825b1_gpio_buttons
);
295 ar71xx_add_device_usb();
300 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1
, "D-Link DIR-825 rev. B1", dir825b1_setup
);