-diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c
---- linux.old/drivers/net/b44.c 2006-01-12 01:44:42.548326000 +0100
-+++ linux.dev/drivers/net/b44.c 2006-01-12 03:07:38.209775500 +0100
+diff -urN linux-2.6.19.ref/drivers/net/b44.c linux-2.6.19/drivers/net/b44.c
+--- linux-2.6.19.ref/drivers/net/b44.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19/drivers/net/b44.c 2006-12-04 21:34:14.000000000 +0100
@@ -1,7 +1,9 @@
-/* b44.c: Broadcom 4400 device driver.
+/* b44.c: Broadcom 4400/47xx device driver.
+ * Copyright (C) 2004 Pekka Pietikainen (pp@ee.oulu.fi)
+ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
+ * Copyright (C) 2006 Felix Fietkau (nbd@openwrt.org)
+ * Copyright (C) 2006 Broadcom Corporation.
*
* Distribute under GPL.
- */
-@@ -31,6 +33,28 @@
- #define DRV_MODULE_VERSION "0.97"
- #define DRV_MODULE_RELDATE "Nov 30, 2005"
+@@ -32,6 +34,28 @@
+ #define DRV_MODULE_VERSION "1.01"
+ #define DRV_MODULE_RELDATE "Jun 16, 2006"
+#ifdef CONFIG_BCM947XX
+extern char *nvram_get(char *name);
#define B44_DEF_MSG_ENABLE \
(NETIF_MSG_DRV | \
NETIF_MSG_PROBE | \
-@@ -77,8 +101,8 @@
+@@ -87,8 +111,8 @@
static char version[] __devinitdata =
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_MODULE_VERSION);
-@@ -93,6 +117,10 @@
+@@ -103,6 +127,10 @@
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401B1,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ } /* terminate list with empty entry */
};
-@@ -131,17 +159,6 @@
+@@ -141,17 +169,6 @@
dma_desc_sync_size, dir);
}
- return readl(bp->regs + reg);
-}
-
--static inline void bw32(const struct b44 *bp,
+-static inline void bw32(const struct b44 *bp,
- unsigned long reg, unsigned long val)
-{
- writel(val, bp->regs + reg);
static int b44_wait_bit(struct b44 *bp, unsigned long reg,
u32 bit, unsigned long timeout, const int clear)
{
-@@ -268,6 +285,10 @@
+@@ -278,6 +295,10 @@
break;
};
#endif
return 0;
}
-@@ -313,14 +334,14 @@
+@@ -287,6 +308,30 @@
+ == SBTMSLOW_CLOCK);
+ }
+
++#ifdef CONFIG_BCM947XX
++static inline void __b44_cam_read(struct b44 *bp, unsigned char *data, int index)
++{
++ u32 val;
++
++ bw32(bp, B44_CAM_CTRL, (CAM_CTRL_READ |
++ (index << CAM_CTRL_INDEX_SHIFT)));
++
++ b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
++
++ val = br32(bp, B44_CAM_DATA_LO);
++
++ data[2] = (val >> 24) & 0xFF;
++ data[3] = (val >> 16) & 0xFF;
++ data[4] = (val >> 8) & 0xFF;
++ data[5] = (val >> 0) & 0xFF;
++
++ val = br32(bp, B44_CAM_DATA_HI);
++
++ data[0] = (val >> 8) & 0xFF;
++ data[1] = (val >> 0) & 0xFF;
++}
++#endif
++
+ static void __b44_cam_write(struct b44 *bp, unsigned char *data, int index)
+ {
+ u32 val;
+@@ -323,14 +368,14 @@
bw32(bp, B44_IMASK, bp->imask);
}
(reg << MDIO_DATA_RA_SHIFT) |
(MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
-@@ -329,18 +350,34 @@
+@@ -339,18 +384,34 @@
return err;
}
/* miilib interface */
/* FIXME FIXME: phy_id is ignored, bp->phy_addr use is unconditional
* due to code existing before miilib use was added to this driver.
-@@ -369,6 +406,8 @@
+@@ -379,6 +440,8 @@
u32 val;
int err;
err = b44_writephy(bp, MII_BMCR, BMCR_RESET);
if (err)
return err;
-@@ -439,6 +478,8 @@
+@@ -442,6 +505,22 @@
u32 val;
int err;
++#ifdef CONFIG_BCM947XX
++ /*
++ * workaround for bad hardware design in Linksys WAP54G v1.0
++ * see https://dev.openwrt.org/ticket/146
++ * check and reset bit "isolate"
++ */
++ if ((bp->pdev->device == PCI_DEVICE_ID_BCM4713) &&
++ (atoi(nvram_get("boardnum")) == 2) &&
++ (__b44_readphy(bp, 0, MII_BMCR, &val) == 0) &&
++ (val & BMCR_ISOLATE) &&
++ (__b44_writephy(bp, 0, MII_BMCR, val & ~BMCR_ISOLATE) != 0)) {
++ printk(KERN_WARNING PFX "PHY: cannot reset MII transceiver isolate bit.\n");
++ }
++#endif
+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
+ return 0;
if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, &val)) != 0)
goto out;
if ((err = b44_writephy(bp, B44_MII_ALEDCTRL,
-@@ -534,6 +575,19 @@
+@@ -537,6 +616,19 @@
{
u32 bmsr, aux;
if (!b44_readphy(bp, MII_BMSR, &bmsr) &&
!b44_readphy(bp, B44_MII_AUXCTRL, &aux) &&
(bmsr != 0xffff)) {
-@@ -1281,9 +1335,10 @@
+@@ -1292,9 +1384,10 @@
bw32(bp, B44_DMARX_CTRL, 0);
bp->rx_prod = bp->rx_cons = 0;
} else {
}
ssb_core_reset(bp);
-@@ -1291,8 +1346,14 @@
+@@ -1302,8 +1395,14 @@
b44_clear_stats(bp);
/* Make PHY accessible. */
br32(bp, B44_MDIO_CTRL);
if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
-@@ -1834,18 +1895,297 @@
+@@ -2034,18 +2133,297 @@
.get_perm_addr = ethtool_op_get_perm_addr,
};
+
+ b44_halt(bp);
+ b44_init_rings(bp);
-+ b44_init_hw(bp);
++ b44_init_hw(bp, 1);
+ netif_wake_queue(bp->dev);
+ spin_unlock_irq(&bp->lock);
+
+ if (bp->flags & B44_FLAG_PAUSE_AUTO) {
+ b44_halt(bp);
+ b44_init_rings(bp);
-+ b44_init_hw(bp);
++ b44_init_hw(bp, 1);
+ } else {
+ __b44_set_flow_ctrl(bp, bp->flags);
+ }
out:
return err;
}
-@@ -1865,22 +2205,43 @@
+@@ -2065,27 +2443,60 @@
static int __devinit b44_get_invariants(struct b44 *bp)
{
u8 eeprom[128];
- int err;
+ u8 buf[32];
+ int err = 0;
-
-- err = b44_read_eeprom(bp, &eeprom[0]);
-- if (err)
-- goto out;
--
-- bp->dev->dev_addr[0] = eeprom[79];
-- bp->dev->dev_addr[1] = eeprom[78];
-- bp->dev->dev_addr[2] = eeprom[81];
-- bp->dev->dev_addr[3] = eeprom[80];
-- bp->dev->dev_addr[4] = eeprom[83];
-- bp->dev->dev_addr[5] = eeprom[82];
-- memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
--
-- bp->phy_addr = eeprom[90] & 0x1f;
++ unsigned long flags;
++
+#ifdef CONFIG_BCM947XX
+ if (bp->pdev->device == PCI_DEVICE_ID_BCM4713) {
-+ /*
++ /*
+ * BCM47xx boards don't have a EEPROM. The MAC is stored in
+ * a NVRAM area somewhere in the flash memory.
+ */
+ sprintf(buf, "et%dmacaddr", b44_4713_instance);
-+ e_aton(nvram_get(buf), bp->dev->dev_addr);
++ if (nvram_get(buf)) {
++ e_aton(nvram_get(buf), bp->dev->dev_addr);
++ } else {
++ /*
++ * Getting the MAC out of NVRAM failed. To make it work
++ * here, we simply rely on the bootloader to write the
++ * MAC into the CAM.
++ */
++ spin_lock_irqsave(&bp->lock, flags);
++ __b44_cam_read(bp, bp->dev->dev_addr, 0);
++ spin_unlock_irqrestore(&bp->lock, flags);
++ }
-+ /*
+- err = b44_read_eeprom(bp, &eeprom[0]);
+- if (err)
+- goto out;
++ /*
+ * BCM47xx boards don't have a PHY. Usually there is a switch
+ * chip with multiple PHYs connected to the PHY port.
+ */
+ err = b44_read_eeprom(bp, &eeprom[0]);
+ if (err)
+ goto out;
-+
+
+- bp->dev->dev_addr[0] = eeprom[79];
+- bp->dev->dev_addr[1] = eeprom[78];
+- bp->dev->dev_addr[2] = eeprom[81];
+- bp->dev->dev_addr[3] = eeprom[80];
+- bp->dev->dev_addr[4] = eeprom[83];
+- bp->dev->dev_addr[5] = eeprom[82];
+ bp->dev->dev_addr[0] = eeprom[79];
+ bp->dev->dev_addr[1] = eeprom[78];
+ bp->dev->dev_addr[2] = eeprom[81];
+ bp->dev->dev_addr[3] = eeprom[80];
+ bp->dev->dev_addr[4] = eeprom[83];
+ bp->dev->dev_addr[5] = eeprom[82];
+
+- if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
+- printk(KERN_ERR PFX "Invalid MAC address found in EEPROM\n");
+- return -EINVAL;
+- }
++ if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
++ printk(KERN_ERR PFX "Invalid MAC address found in EEPROM\n");
++ return -EINVAL;
++ }
+
+- memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
+ memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
-+
+
+- bp->phy_addr = eeprom[90] & 0x1f;
+ bp->phy_addr = eeprom[90] & 0x1f;
+ bp->dma_offset = SB_PCI_DMA;
+ }
-+
+
/* With this, plus the rx_header prepended to the data by the
* hardware, we'll land the ethernet header on a 2-byte boundary.
- */
-@@ -1889,11 +2250,7 @@
+@@ -2095,7 +2506,6 @@
bp->imask = IMASK_DEF;
bp->core_unit = ssb_core_unit(bp);
- bp->dma_offset = SB_PCI_DMA;
-- /* XXX - really required?
-- bp->flags |= B44_FLAG_BUGGY_TXPTR;
-- */
- out:
- return err;
- }
-@@ -2032,11 +2389,17 @@
-
- pci_save_state(bp->pdev);
+ /* XXX - really required?
+ bp->flags |= B44_FLAG_BUGGY_TXPTR;
+@@ -2246,11 +2656,17 @@
+ */
+ b44_chip_reset(bp);
- printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
+ printk(KERN_INFO "%s: Broadcom %s 10/100BaseT Ethernet ", dev->name,
return 0;
err_out_iounmap:
-diff -urN linux.old/drivers/net/b44.h linux.dev/drivers/net/b44.h
---- linux.old/drivers/net/b44.h 2006-01-12 01:44:42.548326000 +0100
-+++ linux.dev/drivers/net/b44.h 2006-01-12 02:55:06.290783500 +0100
-@@ -292,6 +292,10 @@
+diff -urN linux-2.6.19.ref/drivers/net/b44.h linux-2.6.19/drivers/net/b44.h
+--- linux-2.6.19.ref/drivers/net/b44.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19/drivers/net/b44.h 2006-12-04 21:34:14.000000000 +0100
+@@ -297,6 +297,10 @@
#define SSB_PCI_MASK1 0xfc000000
#define SSB_PCI_MASK2 0xc0000000
/* 4400 PHY registers */
#define B44_MII_AUXCTRL 24 /* Auxiliary Control */
#define MII_AUXCTRL_DUPLEX 0x0001 /* Full Duplex */
-@@ -345,6 +349,8 @@
+@@ -350,6 +354,8 @@
};
#define B44_MCAST_TABLE_SIZE 32
#define B44_STAT_REG_DECLARE \
_B44(tx_good_octets) \
-@@ -420,6 +426,7 @@
-
- u32 dma_offset;
- u32 flags;
-+#define B44_FLAG_INIT_COMPLETE 0x00000001
+@@ -428,6 +434,7 @@
+ #define B44_FLAG_B0_ANDLATER 0x00000001
#define B44_FLAG_BUGGY_TXPTR 0x00000002
#define B44_FLAG_REORDER_BUG 0x00000004
++#define B44_FLAG_INIT_COMPLETE 0x00000008
#define B44_FLAG_PAUSE_AUTO 0x00008000
+ #define B44_FLAG_FULL_DUPLEX 0x00010000
+ #define B44_FLAG_100_BASE_T 0x00020000
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