#include <asm/bootinfo.h>
#include <asm/addrspace.h>
+#include <asm/byteorder.h>
#include <asm/mach-adm5120/adm5120_defs.h>
#include <asm/mach-adm5120/adm5120_switch.h>
#include <asm/mach-adm5120/routerboot.h>
#include <asm/mach-adm5120/zynos.h>
+extern char *prom_getenv(char *envname);
/*
* Globals
*/
unsigned int adm5120_package;
unsigned int adm5120_nand_boot;
unsigned long adm5120_speed;
+unsigned long adm5120_memsize;
/*
* Locals
};
static struct adm5120_board __initdata adm5120_boards[] = {
+ /* FIXME: some boards have invalid fields */
+ {
+ .name = "Cellvision CAS-630/630W",
+ .mach_type = MACH_ADM5120_CAS630,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision CAS-670/670W",
+ .mach_type = MACH_ADM5120_CAS670,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision CAS-700/700W",
+ .mach_type = MACH_ADM5120_CAS700,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision CAS-771/771W",
+ .mach_type = MACH_ADM5120_CAS771,
+ .has_usb = 0,
+ .iface_num = 5,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision CAS-790",
+ .mach_type = MACH_ADM5120_CAS790,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision CAS-861/861W",
+ .mach_type = MACH_ADM5120_CAS861,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision NFS-101U/101WU",
+ .mach_type = MACH_ADM5120_NFS101U,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "Cellvision NFS-202U/202WU",
+ .mach_type = MACH_ADM5120_NFS202U,
+ .has_usb = 0,
+ .iface_num = 1,
+ .flash0_size = 4*1024*1024,
+ },
{
.name = "Compex NetPassage 27G",
.mach_type = MACH_ADM5120_NP27G,
.iface_num = 2,
.flash0_size = 4*1024*1024,
},
+ {
+ .name = "Edimax BR-6104K",
+ .mach_type = MACH_ADM5120_BR6104K,
+ .has_usb = 0,
+ .iface_num = 5,
+ .flash0_size = 2*1024*1024,
+ },
+ {
+ .name = "Infineon EASY 5120",
+ .mach_type = MACH_ADM5120_EASY5120,
+ .has_usb = 0,
+ .iface_num = 0,
+ .flash0_size = 2*1024*1024,
+ },
+ {
+ .name = "Infineon EASY 5120-RT",
+ .mach_type = MACH_ADM5120_EASY5120RT,
+ .has_usb = 0,
+ .iface_num = 0,
+ .flash0_size = 2*1024*1024,
+ },
+ {
+ .name = "Infineon EASY 5120P-ATA",
+ .mach_type = MACH_ADM5120_EASY5120PATA,
+ .has_usb = 0,
+ .iface_num = 0,
+ .flash0_size = 2*1024*1024,
+ },
+ {
+ .name = "Infineon EASY 83000",
+ .mach_type = MACH_ADM5120_EASY83000,
+ .has_usb = 0,
+ .iface_num = 6,
+ .flash0_size = 4*1024*1024,
+ },
{
.name = "RouterBOARD 111",
.mach_type = MACH_ADM5120_RB_111,
.iface_num = 5,
.flash0_size = 128*1024,
},
+ {
+ .name = "ZyXEL ES-2024A",
+ .mach_type = MACH_ADM5120_ES2024A,
+ .has_usb = 0,
+ .iface_num = 0,
+ .flash0_size = 4*1024*1024,
+ },
+ {
+ .name = "ZyXEL ES-2024PWR",
+ .mach_type = MACH_ADM5120_ES2024PWR,
+ .has_usb = 0,
+ .iface_num = 0,
+ .flash0_size = 4*1024*1024,
+ },
{
.name = "ZyXEL ES-2108",
.mach_type = MACH_ADM5120_ES2108,
.flash0_size = 4*1024*1024,
},
{
- .name = "ZyXEL ES-2108PWR",
+ .name = "ZyXEL ES-2108-PWR",
.mach_type = MACH_ADM5120_ES2108PWR,
.has_usb = 0,
.iface_num = 0,
.mach_type = MACH_ADM5120_UNKNOWN,
.has_usb = 1,
.iface_num = 5,
- .flash0_size = 0,
+ .flash0_size = 4*1024*1024,
}
};
#define COMPEX_BOARD(d,mt) MYLO_BOARD(VENID_COMPEX,(d),VENID_COMPEX,(d),(mt))
-static struct mylo_board __initdata mylo_boards[] = {
+static struct mylo_board mylo_boards[] __initdata = {
COMPEX_BOARD(DEVID_COMPEX_NP27G, MACH_ADM5120_NP27G),
COMPEX_BOARD(DEVID_COMPEX_NP28G, MACH_ADM5120_NP28G),
COMPEX_BOARD(DEVID_COMPEX_NP28GHS, MACH_ADM5120_NP28GHS),
};
#define ROUTERBOARD(n, mt) { .name = (n), .mach_type = (mt) }
-static struct routerboard __initdata routerboards[] = {
+static struct routerboard routerboards[] __initdata = {
ROUTERBOARD("111", MACH_ADM5120_RB_111),
ROUTERBOARD("112", MACH_ADM5120_RB_112),
ROUTERBOARD("133", MACH_ADM5120_RB_133),
#define DLINK_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_DLINK, bi, mt)
#define LUCENT_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_LUCENT, bi, mt)
-static struct zynos_board __initdata zynos_boards[] = {
+static struct zynos_board zynos_boards[] __initdata = {
ZYXEL_BOARD(ZYNOS_BOARD_HS100, MACH_ADM5120_HS100),
ZYXEL_BOARD(ZYNOS_BOARD_P334, MACH_ADM5120_P334),
ZYXEL_BOARD(ZYNOS_BOARD_P334U, MACH_ADM5120_P334U),
DUMMY_BOARD()
};
+struct common_board {
+ char *name;
+ unsigned long mach_type;
+};
+
+#define DEFBOARD(n, mt) { .name = (n), .mach_type = (mt) }
+static struct common_board common_boards[] __initdata = {
+ DEFBOARD("CAS-630", MACH_ADM5120_CAS630),
+ DEFBOARD("CAS-670", MACH_ADM5120_CAS670),
+ DEFBOARD("CAS-700", MACH_ADM5120_CAS700),
+ DEFBOARD("CAS-771", MACH_ADM5120_CAS771),
+ DEFBOARD("CAS-790", MACH_ADM5120_CAS790),
+ DEFBOARD("CAS-861", MACH_ADM5120_CAS861),
+ DEFBOARD("NFS-101U", MACH_ADM5120_NFS101U),
+ DEFBOARD("NFS-202U", MACH_ADM5120_NFS202U),
+ DEFBOARD("EASY 5120", MACH_ADM5120_EASY5120),
+ DEFBOARD("EASY 5120-RT", MACH_ADM5120_EASY5120RT),
+ DEFBOARD("EASY 5120P-ATA", MACH_ADM5120_EASY5120PATA),
+ DEFBOARD("EASY 83000", MACH_ADM5120_EASY83000),
+ DEFBOARD("BR-6104K", MACH_ADM5120_BR6104K),
+ DEFBOARD("WP54G-WRT", MACH_ADM5120_WP54G_WRT),
+ DEFBOARD("P-334WT", MACH_ADM5120_P334WT),
+ DEFBOARD("P-335", MACH_ADM5120_P335),
+};
+
/*
* Helper routines
*/
return MACH_ADM5120_UNKNOWN;
}
+/*
+ * Misc boards
+ */
+static unsigned long __init prom_detect_board(void)
+{
+ char *name;
+ unsigned long ret;
+ int i;
+
+ ret = MACH_ADM5120_UNKNOWN;
+ name = prom_getenv("board_name");
+ if (name == NULL)
+ goto out;
+
+ if (*name == '\0')
+ goto out;
+
+ for (i=0; i<ARRAY_SIZE(common_boards); i++) {
+ if (strcmp(common_boards[i].name, name) == 0) {
+ ret = common_boards[i].mach_type;
+ break;
+ }
+ }
+
+out:
+ return ret;
+}
+
static void __init adm5120_detect_board(void)
{
struct adm5120_board *board;
adm5120_boot_loader = BOOT_LOADER_UBOOT;
if (t == MACH_ADM5120_UNKNOWN)
t = uboot_detect_board();
+ } else {
+ if (t == MACH_ADM5120_UNKNOWN)
+ t = prom_detect_board();
}
for (board = adm5120_boards; board->mach_type != MACH_ADM5120_UNKNOWN;
memcpy(&adm5120_board, board, sizeof(adm5120_board));
}
+#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
+#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
+
/*
* CPU settings detection
*/
u32 code;
u32 clks;
- code = *(u32 *)KSEG1ADDR(ADM5120_SWITCH_BASE+SWITCH_REG_CODE);
+ code = SWITCH_READ(SWITCH_REG_CODE);
adm5120_product_code = CODE_GET_PC(code);
adm5120_revision = CODE_GET_REV(code);
adm5120_speed += 50000000;
}
+#if 1
+# define mem_dbg(f, ...) prom_printf("mem_detect: " f, ## __VA_ARGS__)
+extern void prom_printf(char *, ...);
+#else
+# define mem_dbg(f, ...)
+#endif
+
+static void __init adm5120_detect_memsize(void)
+{
+ u32 memctrl;
+ u32 size, maxsize;
+ volatile u8 *p,*r;
+ u8 t;
+
+ memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
+ switch (memctrl & MEMCTRL_SDRS_MASK) {
+ case MEMCTRL_SDRS_4M:
+ maxsize = 4 << 20;
+ break;
+ case MEMCTRL_SDRS_8M:
+ maxsize = 8 << 20;
+ break;
+ case MEMCTRL_SDRS_16M:
+ maxsize = 16 << 20;
+ break;
+ default:
+ maxsize = 64 << 20;
+ break;
+ }
+
+ /* FIXME: need to disable buffers for both SDRAM banks? */
+
+ mem_dbg("checking for %ldMB chip\n",maxsize >> 20);
+
+ /* detect size of the 1st SDRAM bank */
+ p = (volatile u8 *)KSEG1ADDR(0);
+ t = *p;
+ for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
+#if 1
+ r = (p+size);
+ *p = 0x55;
+ mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, *r);
+ if (*r == 0x55) {
+ *p = 0xAA;
+ mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, *r);
+ if (*r == 0xAA) {
+ /* mirrored address */
+ mem_dbg("mirrored data found at 0x%lx\n", size);
+ break;
+ }
+ }
+#else
+ p[0] = 0x55;
+ mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, p[size]);
+ if (p[size] != 0x55)
+ continue;
+
+ p[0] = 0xAA;
+ mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, p[size]);
+ if (p[size] != 0xAA)
+ continue;
+
+ /* mirrored address */
+ mem_dbg("mirrored data found at 0x%lx\n", size);
+ break;
+#endif
+ }
+ *p = t;
+
+ mem_dbg("%ldMB chip found\n", size >> 20);
+
+ if (size == (32 << 20))
+ /* if bank size is 32MB, 2nd bank is not supported */
+ goto out;
+
+ if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
+ /* if 2nd bank is not enabled, we are done */
+ goto out;
+
+ /*
+ * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
+ * are missing.
+ */
+ mem_dbg("checking second bank\n");
+ p += (maxsize+size)-1;
+ t = *p;
+ *p = 0x55;
+ if (*p != 0x55)
+ goto out;
+
+ *p = 0xAA;
+ if (*p != 0xAA)
+ goto out;
+
+ *p = t;
+ if (maxsize != size) {
+ /* adjusting MECTRL register */
+ memctrl &= ~(MEMCTRL_SDRS_MASK);
+ switch (size>>20) {
+ case 4:
+ memctrl |= MEMCTRL_SDRS_4M;
+ break;
+ case 8:
+ memctrl |= MEMCTRL_SDRS_8M;
+ break;
+ case 16:
+ memctrl |= MEMCTRL_SDRS_16M;
+ break;
+ default:
+ memctrl |= MEMCTRL_SDRS_64M;
+ break;
+ }
+ SWITCH_WRITE(SWITCH_REG_MEMCTRL, memctrl);
+ }
+ size <<= 1;
+
+out:
+ adm5120_memsize = size;
+ mem_dbg("%ldMB memory found\n",size>>20);
+}
+
void __init adm5120_info_show(void)
{
/* FIXME: move this somewhere else */
- printk("ADM%04X%s revision %d, running at %ldMHz\n",
+ printk(KERN_INFO "ADM%04X%s revision %d, running at %ldMHz\n",
adm5120_product_code,
(adm5120_package == ADM5120_PACKAGE_BGA) ? "" : "P",
adm5120_revision, (adm5120_speed / 1000000)
);
- printk("Boot loader is: %s\n", boot_loader_names[adm5120_boot_loader]);
- printk("Booted from : %s flash\n", adm5120_nand_boot ? "NAND":"NOR");
- printk("Board is : %s\n", adm5120_board_name());
+ printk(KERN_INFO "Boot loader is: %s\n", boot_loader_names[adm5120_boot_loader]);
+ printk(KERN_INFO "Booted from : %s flash\n", adm5120_nand_boot ? "NAND":"NOR");
+ printk(KERN_INFO "Board is : %s\n", adm5120_board_name());
+ printk(KERN_INFO "Memory size : %ldMB\n", adm5120_memsize >> 20);
}
void __init adm5120_info_init(void)
{
+
adm5120_detect_cpuinfo();
+ adm5120_detect_memsize();
adm5120_detect_board();
adm5120_info_show();
projects / openwrt.git / blobdiff