[gemini] enable PCI support

[openwrt.git] / target / linux / cavium-octeon / patches / 002-register_defs_pci.patch

diff --git a/target/linux/cavium-octeon/patches/002-register_defs_pci.patch b/target/linux/cavium-octeon/patches/002-register_defs_pci.patch
index 2252cbf..85a910d 100644 (file)
--- a/target/linux/cavium-octeon/patches/002-register_defs_pci.patch
+++ b/target/linux/cavium-octeon/patches/002-register_defs_pci.patch
@@ -19,9 +19,6 @@ Signed-off-by: David Daney <ddaney@caviumnetworks.com>
  create mode 100644 arch/mips/include/asm/octeon/cvmx-pescx-defs.h
  create mode 100644 arch/mips/include/asm/octeon/cvmx-pexp-defs.h
 
-diff --git a/arch/mips/include/asm/octeon/cvmx-npei-defs.h b/arch/mips/include/asm/octeon/cvmx-npei-defs.h
-new file mode 100644
-index 0000000..4b347bb
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-npei-defs.h
 @@ -0,0 +1,2560 @@
@@ -2585,9 +2582,6 @@ index 0000000..4b347bb
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-npi-defs.h b/arch/mips/include/asm/octeon/cvmx-npi-defs.h
-new file mode 100644
-index 0000000..4e03cd8
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-npi-defs.h
 @@ -0,0 +1,1735 @@
@@ -4326,9 +4320,6 @@ index 0000000..4e03cd8
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-pci-defs.h b/arch/mips/include/asm/octeon/cvmx-pci-defs.h
-new file mode 100644
-index 0000000..90f8d65
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-pci-defs.h
 @@ -0,0 +1,1645 @@
@@ -5977,9 +5968,6 @@ index 0000000..90f8d65
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h b/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h
-new file mode 100644
-index 0000000..d553f8e
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h
 @@ -0,0 +1,1365 @@
@@ -7348,9 +7336,6 @@ index 0000000..d553f8e
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
-new file mode 100644
-index 0000000..75574c9
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
 @@ -0,0 +1,1397 @@
@@ -8751,9 +8736,6 @@ index 0000000..75574c9
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h
-new file mode 100644
-index 0000000..d71bd9c
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h
 @@ -0,0 +1,410 @@
@@ -9167,9 +9149,6 @@ index 0000000..d71bd9c
 +};
 +
 +#endif
-diff --git a/arch/mips/include/asm/octeon/cvmx-pexp-defs.h b/arch/mips/include/asm/octeon/cvmx-pexp-defs.h
-new file mode 100644
-index 0000000..5ea5dc5
 --- /dev/null
 +++ b/arch/mips/include/asm/octeon/cvmx-pexp-defs.h
 @@ -0,0 +1,229 @@
@@ -9402,6 +9381,3 @@ index 0000000..5ea5dc5
 +       CVMX_ADD_IO_SEG(0x00011F0000008380ull)
 +
 +#endif
--- 
-1.5.6.5
-