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[au1000] reinstate 2.6.30 support until 2.6.32 is fixed
[openwrt.git]
/
target
/
linux
/
brcm47xx
/
patches-2.6.32
/
220-bcm5354.patch
diff --git
a/target/linux/brcm47xx/patches-2.6.32/220-bcm5354.patch
b/target/linux/brcm47xx/patches-2.6.32/220-bcm5354.patch
index
360751a
..
1d75e17
100644
(file)
--- a/
target/linux/brcm47xx/patches-2.6.32/220-bcm5354.patch
+++ b/
target/linux/brcm47xx/patches-2.6.32/220-bcm5354.patch
@@
-1,6
+1,6
@@
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
-@@ -2
58,6 +258
,8 @@ void ssb_chipco_resume(struct ssb_chipco
+@@ -2
60,6 +260
,8 @@ void ssb_chipco_resume(struct ssb_chipco
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@
-9,7
+9,7
@@
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
-@@ -28
1,6 +283
,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
+@@ -28
3,6 +285
,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@
-31,7
+31,7
@@
}
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
}
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
-@@ -10
66,6 +1066
,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
+@@ -10
73,6 +1073
,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
if (bus->chip_id == 0x5365) {
rate = 100000000;
if (bus->chip_id == 0x5365) {
rate = 100000000;
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