[ppc40x] merge 2.6.30 patches

[openwrt.git] / target / linux / ppc40x / patches-2.6.30 / 007-openrb-light.patch

diff --git a/target/linux/ppc40x/patches-2.6.30/007-openrb-light.patch b/target/linux/ppc40x/patches-2.6.30/007-openrb-light.patch
index ce0617d..4a3a8e2 100644 (file)
--- a/target/linux/ppc40x/patches-2.6.30/007-openrb-light.patch
+++ b/target/linux/ppc40x/patches-2.6.30/007-openrb-light.patch
@@ -48,7 +48,7 @@
  static int __init ppc40x_probe(void)
 --- /dev/null
 +++ b/arch/powerpc/boot/cuboot-openrb-light.c
-@@ -0,0 +1,41 @@
+@@ -0,0 +1,69 @@
 +/*
 + * Old U-boot compatibility for OpenRB Light board
 + *
@@ -73,8 +73,36 @@
 +
 +static bd_t bd;
 +
++static void fixup_cf_card(void)
++{
++#define DCRN_CPC0_PCI_BASE    0xf9
++#define CF_CS0_BASE           0xff100000
++#define CF_CS1_BASE           0xff200000
++
++      /* Turn on PerWE instead of PCIsomething */
++      mtdcr(DCRN_CPC0_PCI_BASE,
++            mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
++
++      /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
++      mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
++      mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
++
++      /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
++      mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
++      mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
++
++#undef DCRN_CPC0_PCI_BASE
++#undef CF_CS0_BASE
++#undef CF_CS1_BASE
++}
++
 +static void openrb_light_fixups(void)
 +{
++      fixup_cf_card();
 +      ibm405ep_fixup_clocks(33333000);
 +      ibm4xx_sdram_fixup_memsize();
 +      dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
@@ -92,7 +120,7 @@
 +
 --- /dev/null
 +++ b/arch/powerpc/boot/dts/openrb-light.dts
-@@ -0,0 +1,244 @@
+@@ -0,0 +1,252 @@
 +/*
 + * Device Tree Source for OpenRB Light board
 + *
@@ -272,6 +300,14 @@
 +                       */
 +                      clock-frequency = <0>; /* Filled in by zImage */
 +
++                      cf_card@ff100000 {
++                              compatible = "magicbox-cf";
++                              reg = <0x00000000 0xff100000 0x00001000
++                                     0x00000000 0xff200000 0x00001000>;
++                              interrupt-parent = <&UIC0>;
++                              interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
++                      };
++
 +                      nor_flash@ff800000 {
 +                              compatible = "cfi-flash";
 +                              bank-width = <2>;