ramips: implement clock API for RT288x

[openwrt.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt305x.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
index 195bfbe..d1a4df9 100644 (file)
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -1,7 +1,7 @@
 /*
  * Ralink RT305x SoC specific definitions
  *
- * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
  *
  * Parts of this file are based on Ralink's 2.6.21 BSP
  *
@@ -16,11 +16,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
-void rt305x_detect_sys_type(void) __init;
-void rt305x_detect_sys_freq(void) __init;
-
-extern unsigned long rt305x_cpu_freq;
-extern unsigned long rt305x_sys_freq;
+void rt305x_detect_sys_type(void);
 
 #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
 #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
@@ -126,6 +122,6 @@ static inline u32 rt305x_memc_rr(unsigned reg)
 #define RT305X_GPIO_GE0_RXDV   50
 #define RT305X_GPIO_GE0_RXCLK  51
 
-void rt305x_gpio_init(u32 mode) __init;
+void rt305x_gpio_init(u32 mode);
 
 #endif /* _RT305X_H_ */