#include "../core/hcd.h"
#include "../core/hub.h"
-#define DRIVER_VERSION "v0.03"
+#define DRIVER_VERSION "v0.05"
#define DRIVER_AUTHOR "Gabor Juhos <juhosg at openwrt.org>"
#define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
/*-------------------------------------------------------------------------*/
#define ADMHC_VERBOSE_DEBUG /* not always helpful */
-#undef ADMHC_LOCK_DMA
/* For initializing controller (mask in an HCFS mode too) */
#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
/* schedule the ED */
ret = ed_schedule(ahcd, ed);
-fail0:
spin_unlock(&urb->lock);
fail:
if (ret) {
static void admhc_usb_reset(struct admhcd *ahcd)
{
ahcd->host_control = ADMHC_BUSS_RESET;
- admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control);
+ admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
}
/* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
/* Read the number of ports unless overridden */
if (ahcd->num_ports == 0)
- ahcd->num_ports = admhc_get_rhdesc(ahcd) & ADMHC_RH_NUMP;
+ ahcd->num_ports = admhc_read_rhdesc(ahcd) & ADMHC_RH_NUMP;
ret = admhc_mem_init(ahcd);
if (ret)
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
msleep(temp);
- temp = admhc_get_rhdesc(ahcd);
+ temp = admhc_read_rhdesc(ahcd);
if (!(temp & ADMHC_RH_NPS)) {
/* power down each port */
for (temp = 0; temp < ahcd->num_ports; temp++)
- admhc_writel(ahcd, ADMHC_PS_CPP,
- &ahcd->regs->portstatus[temp]);
+ admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
}
/* 2msec timelimit here means no irqs/preempt */
spin_lock_irq(&ahcd->lock);
-retry:
admhc_writel(ahcd, ADMHC_CTRL_SR, &ahcd->regs->gencontrol);
temp = 30; /* ... allow extra time */
while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
u32 ints;
ints = admhc_readl(ahcd, ®s->int_status);
- if ((ints & ADMHC_INTR_INTA) == 0) {
+ if (!(ints & ADMHC_INTR_INTA))
/* no unmasked interrupt status is set */
return IRQ_NONE;
- }
ints &= admhc_readl(ahcd, ®s->int_enable);
+ if (!ints)
+ return IRQ_NONE;
if (ints & ADMHC_INTR_FATI) {
- /* e.g. due to PCI Master/Target Abort */
admhc_disable(ahcd);
admhc_err(ahcd, "Fatal Error, controller disabled\n");
- admhc_dump(ahcd, 1);
admhc_usb_reset(ahcd);
}
if (ints & ADMHC_INTR_BABI) {
- admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
- admhc_err(ahcd, "Babble Detected\n");
admhc_disable(ahcd);
+ admhc_err(ahcd, "Babble Detected\n");
admhc_usb_reset(ahcd);
}
if (ints & ADMHC_INTR_SOFI) {
admhc_intr_ack(ahcd, ADMHC_INTR_SOFI);
+ spin_lock(&ahcd->lock);
/* handle any pending ED removes */
admhc_finish_unlinks(ahcd, admhc_frame_no(ahcd));
- spin_lock(&ahcd->lock);
admhc_sof_refill(ahcd);
spin_unlock(&ahcd->lock);
}
flush_scheduled_work();
admhc_usb_reset(ahcd);
- admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
+ admhc_intr_disable(ahcd, ~0);
free_irq(hcd->irq, hcd);
hcd->irq = -1;