ar71xx: optimize register access in ar71xx_pci.c

[openwrt.git] / target / linux / ar71xx / files / arch / mips / pci / pci-ar724x.c

diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
index 251bf6d..fd52216 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
@@ -30,40 +30,11 @@
 
 static void __iomem *ar724x_pci_localcfg_base;
 static void __iomem *ar724x_pci_devcfg_base;
+static void __iomem *ar724x_pci_ctrl_base;
 static int ar724x_pci_fixup_enable;
 
 static DEFINE_SPINLOCK(ar724x_pci_lock);
 
-static inline void ar724x_pci_wr(unsigned reg, u32 val)
-{
-       void __iomem *base;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       __raw_writel(val, base + reg);
-       (void) __raw_readl(base + reg);
-       iounmap(base);
-}
-
-static inline void ar724x_pci_wr_nf(unsigned reg, u32 val)
-{
-       void __iomem *base;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       __raw_writel(val, base + reg);
-       iounmap(base);
-}
-
-static inline u32 ar724x_pci_rr(unsigned reg)
-{
-       void __iomem *base;
-       u32 ret;
-
-       base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
-       ret = __raw_readl(base + reg);
-       iounmap(base);
-       return ret;
-}
-
 static void ar724x_pci_read(void __iomem *base, int where, int size, u32 *value)
 {
        unsigned long flags;
@@ -246,6 +217,7 @@ static void __init ar724x_pci_reset(void)
 
 static int __init ar724x_pci_setup(void)
 {
+       void __iomem *base = ar724x_pci_ctrl_base;
        u32 t;
 
        /* setup COMMAND register */
@@ -256,19 +228,21 @@ static int __init ar724x_pci_setup(void)
        ar724x_pci_write(ar724x_pci_localcfg_base, 0x20, 4, 0x1ff01000);
        ar724x_pci_write(ar724x_pci_localcfg_base, 0x24, 4, 0x1ff01000);
 
-       t = ar724x_pci_rr(AR724X_PCI_REG_RESET);
+       t = __raw_readl(base + AR724X_PCI_REG_RESET);
        if (t != 0x7) {
                udelay(100000);
-               ar724x_pci_wr_nf(AR724X_PCI_REG_RESET, 0);
+               __raw_writel(0, base + AR724X_PCI_REG_RESET);
                udelay(100);
-               ar724x_pci_wr_nf(AR724X_PCI_REG_RESET, 4);
+               __raw_writel(4, base + AR724X_PCI_REG_RESET);
                udelay(100000);
        }
 
-       ar724x_pci_wr(AR724X_PCI_REG_APP, AR724X_PCI_APP_LTSSM_ENABLE);
+       __raw_writel(AR724X_PCI_APP_LTSSM_ENABLE, base + AR724X_PCI_REG_APP);
+       /* flush write */
+       (void) __raw_readl(base + AR724X_PCI_REG_APP);
        udelay(1000);
 
-       t = ar724x_pci_rr(AR724X_PCI_REG_APP);
+       t = __raw_readl(base + AR724X_PCI_REG_APP);
        if ((t & AR724X_PCI_APP_LTSSM_ENABLE) == 0x0) {
                printk(KERN_WARNING "PCI: no PCIe module found\n");
                return -ENODEV;
@@ -279,10 +253,11 @@ static int __init ar724x_pci_setup(void)
 
 static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
+       void __iomem *base = ar724x_pci_ctrl_base;
        u32 pending;
 
-       pending = ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS) &
-                 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK);
+       pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
+                 __raw_readl(base + AR724X_PCI_REG_INT_MASK);
 
        if (pending & AR724X_PCI_INT_DEV0)
                generic_handle_irq(AR71XX_PCI_IRQ_DEV0);
@@ -293,33 +268,43 @@ static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 static void ar724x_pci_irq_unmask(unsigned int irq)
 {
+       void __iomem *base = ar724x_pci_ctrl_base;
+       u32 t;
+
        switch (irq) {
        case AR71XX_PCI_IRQ_DEV0:
                irq -= AR71XX_PCI_IRQ_BASE;
-               ar724x_pci_wr(AR724X_PCI_REG_INT_MASK,
-                             ar724x_pci_rr(AR724X_PCI_REG_INT_MASK) |
-                                           AR724X_PCI_INT_DEV0);
+
+               t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+               __raw_writel(t | AR724X_PCI_INT_DEV0,
+                            base + AR724X_PCI_REG_INT_MASK);
                /* flush write */
-               ar724x_pci_rr(AR724X_PCI_REG_INT_MASK);
+               (void) __raw_readl(base + AR724X_PCI_REG_INT_MASK);
        }
 }
 
 static void ar724x_pci_irq_mask(unsigned int irq)
 {
+       void __iomem *base = ar724x_pci_ctrl_base;
+       u32 t;
+
        switch (irq) {
        case AR71XX_PCI_IRQ_DEV0:
                irq -= AR71XX_PCI_IRQ_BASE;
-               ar724x_pci_wr(AR724X_PCI_REG_INT_MASK,
-                             ar724x_pci_rr(AR724X_PCI_REG_INT_MASK) &
-                                           ~AR724X_PCI_INT_DEV0);
+
+               t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+               __raw_writel(t & ~AR724X_PCI_INT_DEV0,
+                            base + AR724X_PCI_REG_INT_MASK);
+
                /* flush write */
-               ar724x_pci_rr(AR724X_PCI_REG_INT_MASK);
+               (void) __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+
+               t = __raw_readl(base + AR724X_PCI_REG_INT_STATUS);
+               __raw_writel(t | AR724X_PCI_INT_DEV0,
+                            base + AR724X_PCI_REG_INT_STATUS);
 
-               ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS,
-                             ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS) |
-                                           AR724X_PCI_INT_DEV0);
                /* flush write */
-               ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS);
+               (void) __raw_readl(base + AR724X_PCI_REG_INT_STATUS);
        }
 }
 
@@ -332,6 +317,7 @@ static struct irq_chip ar724x_pci_irq_chip = {
 
 static void __init ar724x_pci_irq_init(void)
 {
+       void __iomem *base = ar724x_pci_ctrl_base;
        u32 t;
        int i;
 
@@ -341,8 +327,8 @@ static void __init ar724x_pci_irq_init(void)
                return;
        }
 
-       ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, 0);
-       ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS, 0);
+       __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
+       __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
 
        for (i = AR71XX_PCI_IRQ_BASE;
             i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
@@ -368,10 +354,15 @@ int __init ar724x_pcibios_init(void)
        if (ar724x_pci_devcfg_base == NULL)
                goto err_unmap_localcfg;
 
+       ar724x_pci_ctrl_base = ioremap_nocache(AR724X_PCI_CTRL_BASE,
+                                              AR724X_PCI_CTRL_SIZE);
+       if (ar724x_pci_ctrl_base == NULL)
+               goto err_unmap_devcfg;
+
        ar724x_pci_reset();
        ret = ar724x_pci_setup();
        if (ret)
-               goto err_unmap_devcfg;
+               goto err_unmap_ctrl;
 
        ar724x_pci_fixup_enable = 1;
        ar724x_pci_irq_init();
@@ -379,7 +370,9 @@ int __init ar724x_pcibios_init(void)
 
        return 0;
 
- err_unmap_devcfg:
+ err_unmap_ctrl:
+       iounmap(ar724x_pci_ctrl_base);
+  err_unmap_devcfg:
        iounmap(ar724x_pci_devcfg_base);
  err_unmap_localcfg:
        iounmap(ar724x_pci_localcfg_base);