ramips: rt288x: change base address and window size of flash bank 0

[openwrt.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt305x_regs.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
index 6e7b9e8..64918fe 100644 (file)
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
@@ -20,6 +20,7 @@
 #define RT305X_MEMC_BASE       0x10000300
 #define RT305X_PCM_BASE                0x10000400
 #define RT305X_UART0_BASE      0x10000500
+#define RT305X_PIO_BASE                0x10000600
 #define RT305X_GDMA_BASE       0x10000700
 #define RT305X_NANDC_BASE      0x10000800
 #define RT305X_I2C_BASE                0x10000900
@@ -39,7 +40,9 @@
 #define RT305X_INTC_SIZE       0x100
 #define RT305X_MEMC_SIZE       0x100
 #define RT305X_UART0_SIZE      0x100
+#define RT305X_PIO_SIZE                0x100
 #define RT305X_UART1_SIZE      0x100
+#define RT305X_SPI_SIZE                0x100
 #define RT305X_FLASH1_SIZE     (16 * 1024 * 1024)
 #define RT305X_FLASH0_SIZE     (8 * 1024 * 1024)
 
@@ -62,6 +65,11 @@
 #define SYSTEM_CONFIG_CPUCLK_MASK      0x1
 #define SYSTEM_CONFIG_CPUCLK_320       0x0
 #define SYSTEM_CONFIG_CPUCLK_384       0x1
+#define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT      2
+#define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK       0x3
+#define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL     0
+#define SYSTEM_CONFIG_SRAM_CS0_MODE_WDT                1
+#define SYSTEM_CONFIG_SRAM_CS0_MODE_BTCOEX     2
 
 #define RT305X_GPIO_MODE_I2C           BIT(0)
 #define RT305X_GPIO_MODE_SPI           BIT(1)