#include <linux/spinlock.h>
#include <linux/mfd/core.h>
#include <linux/mfd/glamo.h>
-#include <linux/spi/glamo.h>
-#include <linux/glamo-gpio.h>
#include <linux/glamofb.h>
#include <linux/io.h>
#include <asm/div64.h>
-#ifdef CONFIG_PM
#include <linux/pm.h>
-#endif
#include "glamo-regs.h"
#include "glamo-core.h"
/* { 0x1500, 0x080, "MPU 0", 0 },
{ 0x1580, 0x080, "MPU 1", 0 },
{ 0x1600, 0x080, "Cmd Queue", 0 },
- { 0x1680, 0x080, "RISC CPU", 0 },
+ { 0x1680, 0x080, "RISC CPU", 0 },*/
{ 0x1700, 0x400, "2D Unit", 0 },
- { 0x1b00, 0x900, "3D Unit", 0 }, */
+/* { 0x1b00, 0x900, "3D Unit", 0 }, */
};
static inline void __reg_write(struct glamo_core *glamo,
spin_unlock(&glamo->lock);
}
+static int __reg_write_batch(struct glamo_core *glamo,
+ uint16_t start, size_t num, uint16_t *regs)
+{
+ int end = start + num * 2
+ for(end = start + num * 2; start < end; start += 2, ++regs) {
+ *regs = __reg_read(glamo, start);
+ }
+}
+
static inline void __reg_set_bit(struct glamo_core *glamo,
u_int16_t reg, u_int16_t bit)
{
enum glamo_cells {
GLAMO_CELL_FB,
GLAMO_CELL_MMC,
- GLAMO_CELL_SPI_GPIO
+ GLAMO_CELL_GPIO,
};
static struct mfd_cell glamo_cells[] = {
.num_resources = ARRAY_SIZE(glamo_mmc_resources),
.resources = glamo_mmc_resources,
},
- [GLAMO_CELL_SPI_GPIO] = {
- .name = "glamo-spi-gpio",
+ [GLAMO_CELL_GPIO] = {
+ .name = "glamo-gpio",
},
};
GLAMO_CLOCK_MMC_EN_M9CLK |
GLAMO_CLOCK_MMC_EN_TCLK |
GLAMO_CLOCK_MMC_DG_M9CLK |
- GLAMO_CLOCK_MMC_DG_TCLK, 0xffff);
+ GLAMO_CLOCK_MMC_DG_TCLK,
+ 0xffff);
/* enable the TCLK divider clk input */
__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine)
{
- uint16_t reg = reset_regs[engine].reg;
- uint16_t val = reset_regs[engine].val;
+ uint16_t reg = reset_regs[engine].reg;
+ uint16_t val = reset_regs[engine].val;
if (engine >= ARRAY_SIZE(reset_regs)) {
dev_warn(&glamo->pdev->dev, "unknown engine %u ", engine);
}
EXPORT_SYMBOL_GPL(glamo_engine_reset);
-void glamo_lcm_reset(struct platform_device *pdev, int level)
-{
- struct glamo_core *glamo = dev_get_drvdata(&pdev->dev);
- if (!glamo)
- return;
-
- glamo_gpio_setpin(glamo, GLAMO_GPIO4, level);
- glamo_gpio_cfgpin(glamo, GLAMO_GPIO4_OUTPUT);
-}
-EXPORT_SYMBOL_GPL(glamo_lcm_reset);
-
int glamo_pll_rate(struct glamo_core *glamo,
enum glamo_pll pll)
{
int len, int may_sleep)
{
int i;
+ const struct glamo_script *line = script;
- for (i = 0; i < len; i++) {
- struct glamo_script *line = &script[i];
-
+ for (i = 0; i < len; ++i, ++line) {
switch (line->reg) {
case 0xffff:
return 0;
{ GLAMO_REG_MEM_DRAM1, 0xe100 },
{ GLAMO_REG_MEM_DRAM2, 0x01d6 },
{ GLAMO_REG_CLOCK_MEMORY, 0x000b },
- { GLAMO_REG_GPIO_GEN1, 0x000f },
- { GLAMO_REG_GPIO_GEN2, 0x111e },
- { GLAMO_REG_GPIO_GEN3, 0xccc3 },
- { GLAMO_REG_GPIO_GEN4, 0x111e },
- { GLAMO_REG_GPIO_GEN5, 0x000f },
};
#if 0
static struct glamo_script glamo_resume_script[] = {
glamo_pll_rate(glamo, GLAMO_PLL1),
glamo_pll_rate(glamo, GLAMO_PLL2));
- /* register siblings */
- glamo->pdata->mmc_data->core = glamo;
- glamo_cells[GLAMO_CELL_MMC].platform_data = glamo->pdata->mmc_data;
- glamo_cells[GLAMO_CELL_MMC].data_size =
- sizeof(struct glamo_mmc_platform_data);
-
- glamo->pdata->fb_data->core = glamo;
- glamo_cells[GLAMO_CELL_FB].platform_data = glamo->pdata->fb_data;
- glamo_cells[GLAMO_CELL_FB].data_size = sizeof(struct glamo_fb_platform_data);
-
- glamo->pdata->spigpio_data->core = glamo;
- glamo_cells[GLAMO_CELL_SPI_GPIO].platform_data =
- glamo->pdata->spigpio_data;
- glamo_cells[GLAMO_CELL_SPI_GPIO].data_size =
- sizeof(struct glamo_spigpio_platform_data);
-
mfd_add_devices(&pdev->dev, pdev->id, glamo_cells,
ARRAY_SIZE(glamo_cells),
glamo->mem, 0);
#ifdef CONFIG_PM
-static int glamo_suspend(struct platform_device *pdev, pm_message_t state)
+static int glamo_suspend(struct device *dev)
{
- struct glamo_core *glamo = dev_get_drvdata(&pdev->dev);
+ struct glamo_core *glamo = dev_get_drvdata(dev);
glamo->suspending = 1;
glamo_power(glamo, GLAMO_POWER_SUSPEND);
return 0;
}
-static int glamo_resume(struct platform_device *pdev)
+static int glamo_resume(struct device *dev)
{
- struct glamo_core *glamo = dev_get_drvdata(&pdev->dev);
+ struct glamo_core *glamo = dev_get_drvdata(dev);
glamo_power(glamo, GLAMO_POWER_ON);
glamo->suspending = 0;
-
return 0;
}
+static struct dev_pm_ops glamo_pm_ops = {
+ .suspend = glamo_suspend,
+ .resume = glamo_resume,
+};
+
+#define GLAMO_PM_OPS (&glamo_pm_ops)
+
#else
-#define glamo_suspend NULL
-#define glamo_resume NULL
+#define GLAMO_PM_OPS NULL
#endif
static struct platform_driver glamo_driver = {
.probe = glamo_probe,
.remove = glamo_remove,
- .suspend = glamo_suspend,
- .resume = glamo_resume,
.driver = {
.name = "glamo3362",
.owner = THIS_MODULE,
+ .pm = GLAMO_PM_OPS,
},
};