ar71xx: introduce global ar724x_pci_ctrl_base variable

[openwrt.git] / target / linux / ar71xx / files / arch / mips / pci / pci-ar71xx.c

diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
index 711a109..ac94da9 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
@@ -17,6 +17,7 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/pci_regs.h>
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/pci_regs.h>

+#include <linux/interrupt.h>

 
 #include <asm/mach-ar71xx/ar71xx.h>
 #include <asm/mach-ar71xx/pci.h>
 
 #include <asm/mach-ar71xx/ar71xx.h>
 #include <asm/mach-ar71xx/pci.h>


@@ -38,6 +39,7 @@
 
 static void __iomem *ar71xx_pcicfg_base;
 static DEFINE_SPINLOCK(ar71xx_pci_lock);
 
 static void __iomem *ar71xx_pcicfg_base;
 static DEFINE_SPINLOCK(ar71xx_pci_lock);

+static int ar71xx_pci_fixup_enable;

 
 static inline void ar71xx_pci_delay(void)
 {
 
 static inline void ar71xx_pci_delay(void)
 {


@@ -228,6 +230,9 @@ static void ar71xx_pci_fixup(struct pci_dev *dev)
 {
        u32 t;
 
 {
        u32 t;
 

+       if (!ar71xx_pci_fixup_enable)
+               return;
+

        if (dev->bus->number != 0 || dev->devfn != 0)
                return;
 
        if (dev->bus->number != 0 || dev->devfn != 0)
                return;
 


@@ -296,6 +301,73 @@ static struct pci_controller ar71xx_pci_controller = {
        .io_resource    = &ar71xx_pci_io_resource,
 };
 
        .io_resource    = &ar71xx_pci_io_resource,
 };
 

+static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+       u32 pending;
+
+       pending = ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_STATUS) &
+                 ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE);
+
+       if (pending & PCI_INT_DEV0)
+               generic_handle_irq(AR71XX_PCI_IRQ_DEV0);
+
+       else if (pending & PCI_INT_DEV1)
+               generic_handle_irq(AR71XX_PCI_IRQ_DEV1);
+
+       else if (pending & PCI_INT_DEV2)
+               generic_handle_irq(AR71XX_PCI_IRQ_DEV2);
+
+       else if (pending & PCI_INT_CORE)
+               generic_handle_irq(AR71XX_PCI_IRQ_CORE);
+
+       else
+               spurious_interrupt();
+}
+
+static void ar71xx_pci_irq_unmask(unsigned int irq)
+{
+       irq -= AR71XX_PCI_IRQ_BASE;
+       ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE,
+               ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) | (1 << irq));
+
+       /* flush write */
+       ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE);
+}
+
+static void ar71xx_pci_irq_mask(unsigned int irq)
+{
+       irq -= AR71XX_PCI_IRQ_BASE;
+       ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE,
+               ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) & ~(1 << irq));
+
+       /* flush write */
+       ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE);
+}
+
+static struct irq_chip ar71xx_pci_irq_chip = {
+       .name           = "AR71XX PCI ",
+       .mask           = ar71xx_pci_irq_mask,
+       .unmask         = ar71xx_pci_irq_unmask,
+       .mask_ack       = ar71xx_pci_irq_mask,
+};
+
+static void __init ar71xx_pci_irq_init(void)
+{
+       int i;
+
+       ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, 0);
+       ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_STATUS, 0);
+
+       for (i = AR71XX_PCI_IRQ_BASE;
+            i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
+               irq_desc[i].status = IRQ_DISABLED;
+               set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
+                                        handle_level_irq);
+       }
+
+       set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
+}
+

 int __init ar71xx_pcibios_init(void)
 {
        ar71xx_device_stop(RESET_MODULE_PCI_BUS | RESET_MODULE_PCI_CORE);
 int __init ar71xx_pcibios_init(void)
 {
        ar71xx_device_stop(RESET_MODULE_PCI_BUS | RESET_MODULE_PCI_CORE);


@@ -321,6 +393,8 @@ int __init ar71xx_pcibios_init(void)
        /* clear bus errors */
        (void)ar71xx_pci_be_handler(1);
 
        /* clear bus errors */
        (void)ar71xx_pci_be_handler(1);
 

+       ar71xx_pci_fixup_enable = 1;
+       ar71xx_pci_irq_init();

        register_pci_controller(&ar71xx_pci_controller);
 
        return 0;
        register_pci_controller(&ar71xx_pci_controller);
 
        return 0;