++ switch(channel)
++ {
++ case(0):
++ avalanche_hw0_chregs->cintnr0 = line;
++ break;
++ case(1):
++ avalanche_hw0_chregs->cintnr1 = line;
++ break;
++ case(2):
++ avalanche_hw0_chregs->cintnr2 = line;
++ break;
++ case(3):
++ avalanche_hw0_chregs->cintnr3 = line;
++ break;
++ case(4):
++ avalanche_hw0_chregs->cintnr4 = line;
++ break;
++ case(5):
++ avalanche_hw0_chregs->cintnr5 = line;
++ break;
++ case(6):
++ avalanche_hw0_chregs->cintnr6 = line;
++ break;
++ case(7):
++ avalanche_hw0_chregs->cintnr7 = line;
++ break;
++ case(8):
++ avalanche_hw0_chregs->cintnr8 = line;
++ break;
++ case(9):
++ avalanche_hw0_chregs->cintnr9 = line;
++ break;
++ case(10):
++ avalanche_hw0_chregs->cintnr10 = line;
++ break;
++ case(11):
++ avalanche_hw0_chregs->cintnr11 = line;
++ break;
++ case(12):
++ avalanche_hw0_chregs->cintnr12 = line;
++ break;
++ case(13):
++ avalanche_hw0_chregs->cintnr13 = line;
++ break;
++ case(14):
++ avalanche_hw0_chregs->cintnr14 = line;
++ break;
++ case(15):
++ avalanche_hw0_chregs->cintnr15 = line;
++ break;
++ case(16):
++ avalanche_hw0_chregs->cintnr16 = line;
++ break;
++ case(17):
++ avalanche_hw0_chregs->cintnr17 = line;
++ break;
++ case(18):
++ avalanche_hw0_chregs->cintnr18 = line;
++ break;
++ case(19):
++ avalanche_hw0_chregs->cintnr19 = line;
++ break;
++ case(20):
++ avalanche_hw0_chregs->cintnr20 = line;
++ break;
++ case(21):
++ avalanche_hw0_chregs->cintnr21 = line;
++ break;
++ case(22):
++ avalanche_hw0_chregs->cintnr22 = line;
++ break;
++ case(23):
++ avalanche_hw0_chregs->cintnr23 = line;
++ break;
++ case(24):
++ avalanche_hw0_chregs->cintnr24 = line;
++ break;
++ case(25):
++ avalanche_hw0_chregs->cintnr25 = line;
++ break;
++ case(26):
++ avalanche_hw0_chregs->cintnr26 = line;
++ break;
++ case(27):
++ avalanche_hw0_chregs->cintnr27 = line;
++ break;
++ case(28):
++ avalanche_hw0_chregs->cintnr28 = line;
++ break;
++ case(29):
++ avalanche_hw0_chregs->cintnr29 = line;
++ break;
++ case(30):
++ avalanche_hw0_chregs->cintnr30 = line;
++ break;
++ case(31):
++ avalanche_hw0_chregs->cintnr31 = line;
++ break;
++ case(32):
++ avalanche_hw0_chregs->cintnr32 = line;
++ break;
++ case(33):
++ avalanche_hw0_chregs->cintnr33 = line;
++ break;
++ case(34):
++ avalanche_hw0_chregs->cintnr34 = line;
++ break;
++ case(35):
++ avalanche_hw0_chregs->cintnr35 = line;
++ break;
++ case(36):
++ avalanche_hw0_chregs->cintnr36 = line;
++ break;
++ case(37):
++ avalanche_hw0_chregs->cintnr37 = line;
++ break;
++ case(38):
++ avalanche_hw0_chregs->cintnr38 = line;
++ break;
++ case(39):
++ avalanche_hw0_chregs->cintnr39 = line;
++ break;
++ default:
++ printk("Error: Unknown Avalanche interrupt channel\n");
++ }
++
++ line_to_channel[line] = channel; /* Suraj check */
++
++ if (channel == UNIFIED_SECONDARY_INTERRUPT)
++ uni_secondary_interrupt = line;
++
++}
++
++
++#define AVALANCHE_MAX_PACING_BLK 3
++#define AVALANCHE_PACING_LOW_VAL 2
++#define AVALANCHE_PACING_HIGH_VAL 63
++
++int avalanche_request_pacing(int irq_nr, unsigned int blk_num,
++ unsigned int pace_value)
++{
++ unsigned int blk_offset;
++ unsigned long flags;
++
++ if(irq_nr < MIPS_EXCEPTION_OFFSET &&
++ irq_nr >= AVALANCHE_INT_END_PRIMARY)
++ return (0);
++
++ if(blk_num > AVALANCHE_MAX_PACING_BLK)
++ return(-1);
++
++ if(pace_value > AVALANCHE_PACING_HIGH_VAL &&
++ pace_value < AVALANCHE_PACING_LOW_VAL)
++ return(-1);
++
++ blk_offset = blk_num*8;
++
++ save_and_cli(flags);
++
++ /* disable the interrupt pacing, if enabled previously */
++ avalanche_hw0_ipaceregs->ipacemax &= ~(0xff << blk_offset);
++
++ /* clear the pacing map */
++ avalanche_hw0_ipaceregs->ipacemap &= ~(0xff << blk_offset);
++
++ /* setup the new values */
++ avalanche_hw0_ipaceregs->ipacemap |= ((AVINTNUM(irq_nr)) << blk_offset);
++ avalanche_hw0_ipaceregs->ipacemax |= ((0x80 | pace_value) << blk_offset);
++
++ restore_flags(flags);
++
++ return(0);
++}
+diff -urN kernel-base/arch/mips/ar7/Makefile kernel-current/arch/mips/ar7/Makefile
+--- kernel-base/arch/mips/ar7/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/Makefile 2005-07-10 08:23:55.081408136 +0200
+@@ -0,0 +1,29 @@
++# $Id$
++# Copyright (C) $Date$ $Author$
++#
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 2 of the License, or
++# (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++
++.S.s:
++ $(CPP) $(AFLAGS) $< -o $*.s
++
++.S.o:
++ $(CC) $(AFLAGS) -c $< -o $*.o
++
++O_TARGET := ar7.o
++
++export-objs := init.o irq.o
++obj-y := setup.o irq.o mipsIRQ.o reset.o init.o memory.o printf.o cmdline.o time.o
++
++include $(TOPDIR)/Rules.make
+diff -urN kernel-base/arch/mips/ar7/memory.c kernel-current/arch/mips/ar7/memory.c
+--- kernel-base/arch/mips/ar7/memory.c 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/memory.c 2005-07-10 06:40:39.586266560 +0200
+@@ -0,0 +1,130 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ * PROM library functions for acquiring/using memory descriptors given to
++ * us from the YAMON.
++ *
++ */
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/bootmem.h>
++
++#include <asm/bootinfo.h>
++#include <asm/page.h>
++#include <asm/mips-boards/prom.h>
++#include <asm/ar7/ar7.h>
++
++enum yamon_memtypes {
++ yamon_dontuse,
++ yamon_prom,
++ yamon_free,
++};
++struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
++
++/* References to section boundaries */
++extern char _end;
++
++#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
++
++
++struct prom_pmemblock * __init prom_getmdesc(void)
++{
++ char *memsize_str;
++ unsigned int memsize;
++
++ memsize_str = prom_getenv("memsize");
++ if (!memsize_str) {
++ memsize = 0x02000000;
++ } else {
++ memsize = simple_strtol(memsize_str, NULL, 0);
++ }
++
++ memset(mdesc, 0, sizeof(mdesc));
++
++ mdesc[0].type = yamon_dontuse;
++ mdesc[0].base = 0x00000000;
++ mdesc[0].size = CONFIG_AR7_MEMORY;
++
++ mdesc[1].type = yamon_prom;
++ mdesc[1].base = CONFIG_AR7_MEMORY;
++ mdesc[1].size = 0x00020000;
++
++ mdesc[2].type = yamon_free;
++ mdesc[2].base = CONFIG_AR7_MEMORY + 0x00020000;
++ mdesc[2].size = (memsize + CONFIG_AR7_MEMORY) - mdesc[2].base;
++
++ return &mdesc[0];
++}
++
++static int __init prom_memtype_classify (unsigned int type)
++{
++ switch (type) {
++ case yamon_free:
++ return BOOT_MEM_RAM;
++ case yamon_prom:
++ return BOOT_MEM_ROM_DATA;
++ default:
++ return BOOT_MEM_RESERVED;
++ }
++}
++
++void __init prom_meminit(void)
++{
++ struct prom_pmemblock *p;
++
++ p = prom_getmdesc();
++
++ while (p->size) {
++ long type;
++ unsigned long base, size;
++
++ type = prom_memtype_classify (p->type);
++ base = p->base;
++ size = p->size;
++
++ add_memory_region(base, size, type);
++ p++;
++ }
++}
++
++void __init prom_free_prom_memory (void)
++{
++ int i;
++ unsigned long freed = 0;
++ unsigned long addr;
++
++ for (i = 0; i < boot_mem_map.nr_map; i++) {
++ if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
++ continue;
++
++ addr = boot_mem_map.map[i].addr;
++ while (addr < boot_mem_map.map[i].addr
++ + boot_mem_map.map[i].size) {
++ ClearPageReserved(virt_to_page(__va(addr)));
++ set_page_count(virt_to_page(__va(addr)), 1);
++ free_page((unsigned long)__va(addr));
++ addr += PAGE_SIZE;
++ freed += PAGE_SIZE;
++ }
++ }
++ printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
++}
+diff -urN kernel-base/arch/mips/ar7/mipsIRQ.S kernel-current/arch/mips/ar7/mipsIRQ.S
+--- kernel-base/arch/mips/ar7/mipsIRQ.S 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/mipsIRQ.S 2005-07-10 06:40:39.587266408 +0200
+@@ -0,0 +1,120 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ * Interrupt exception dispatch code.
++ *
++ */
++#include <linux/config.h>
++
++#include <asm/asm.h>
++#include <asm/mipsregs.h>
++#include <asm/regdef.h>
++#include <asm/stackframe.h>
++
++/* A lot of complication here is taken away because:
++ *
++ * 1) We handle one interrupt and return, sitting in a loop and moving across
++ * all the pending IRQ bits in the cause register is _NOT_ the answer, the
++ * common case is one pending IRQ so optimize in that direction.
++ *
++ * 2) We need not check against bits in the status register IRQ mask, that
++ * would make this routine slow as hell.
++ *
++ * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in
++ * between like BSD spl() brain-damage.
++ *
++ * Furthermore, the IRQs on the MIPS board look basically (barring software
++ * IRQs which we don't use at all and all external interrupt sources are
++ * combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
++ *
++ * MIPS IRQ Source
++ * -------- ------
++ * 0 Software (ignored)
++ * 1 Software (ignored)
++ * 2 Combined hardware interrupt (hw0)
++ * 3 Hardware (ignored)
++ * 4 Hardware (ignored)
++ * 5 Hardware (ignored)
++ * 6 Hardware (ignored)
++ * 7 R4k timer (what we use)
++ *
++ * Note: On the SEAD board thing are a little bit different.
++ * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
++ * wired to UART1.
++ *
++ * We handle the IRQ according to _our_ priority which is:
++ *
++ * Highest ---- R4k Timer
++ * Lowest ---- Combined hardware interrupt
++ *
++ * then we just return, if multiple IRQs are pending then we will just take
++ * another exception, big deal.
++ */
++
++.text
++.set noreorder
++.set noat
++ .align 5
++NESTED(mipsIRQ, PT_SIZE, sp)
++ SAVE_ALL
++ CLI
++ .set at
++
++ mfc0 s0, CP0_CAUSE # get irq bits
++
++ /* First we check for r4k counter/timer IRQ. */
++ andi a0, s0, CAUSEF_IP7
++ beq a0, zero, 1f
++ andi a0, s0, CAUSEF_IP2 # delay slot, check hw0 interrupt
++
++ /* Wheee, a timer interrupt. */
++ move a0, sp
++ jal ar7_timer_interrupt
++ nop
++
++ j ret_from_irq
++ nop
++
++ 1:
++ beq a0, zero, 1f # delay slot, check hw3 interrupt
++ nop
++
++ /* Wheee, combined hardware level zero interrupt. */
++ jal avalanche_hw0_irqdispatch
++ move a0, sp # delay slot
++
++ j ret_from_irq
++ nop # delay slot
++
++ 1:
++ /*
++ * Here by mistake? This is possible, what can happen is that by the
++ * time we take the exception the IRQ pin goes low, so just leave if
++ * this is the case.
++ */
++ move a1,s0
++ PRINT("Got interrupt: c0_cause = %08x\n")
++ mfc0 a1, CP0_EPC
++ PRINT("c0_epc = %08x\n")
++
++ j ret_from_irq
++ nop
++END(mipsIRQ)
+diff -urN kernel-base/arch/mips/ar7/printf.c kernel-current/arch/mips/ar7/printf.c
+--- kernel-base/arch/mips/ar7/printf.c 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/printf.c 2005-07-10 06:40:39.587266408 +0200
+@@ -0,0 +1,54 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * Putting things on the screen/serial line using Adam2 facilities.
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/serial_reg.h>
++#include <linux/spinlock.h>
++#include <asm/io.h>
++#include <asm/serial.h>
++#include <asm/addrspace.h>
++#include <asm/ar7/ar7.h>
++
++#define AVALANCHE_YAMON_FUNCTION_BASE (KSEG1ADDR(0x10000500))
++#define AVALANCHE_YAMON_PROM_PRINT_COUNT_ADDR (AVALANCHE_YAMON_FUNCTION_BASE + 0x4) /* print_count function */
++
++static char ppbuf[1024];
++
++void (*prom_print_str)(unsigned int out, char *s, int len);
++
++void prom_printf(char *fmt, ...) __init;
++void prom_printf(char *fmt, ...)
++{
++ va_list args;
++ int len;
++ prom_print_str = (void *)*(unsigned int *)AVALANCHE_YAMON_PROM_PRINT_COUNT_ADDR;
++
++ va_start(args, fmt);
++ vsprintf(ppbuf, fmt, args);
++ len = strlen(ppbuf);
++
++ prom_print_str(1, ppbuf, len);
++
++ va_end(args);
++ return;
++
++}
+diff -urN kernel-base/arch/mips/ar7/reset.c kernel-current/arch/mips/ar7/reset.c
+--- kernel-base/arch/mips/ar7/reset.c 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/reset.c 2005-07-10 06:40:39.587266408 +0200
+@@ -0,0 +1,54 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ * Reset the MIPS boards.
++ *
++ */
++#include <linux/config.h>
++
++#include <asm/reboot.h>
++#include <asm/mips-boards/generic.h>
++
++static void ar7_machine_restart(char *command);
++static void ar7_machine_halt(void);
++static void ar7_machine_power_off(void);
++
++static void ar7_machine_restart(char *command)
++{
++
++}
++
++static void ar7_machine_halt(void)
++{
++
++}
++
++static void ar7_machine_power_off(void)
++{
++
++}
++
++void ar7_reboot_setup(void)
++{
++ _machine_restart = ar7_machine_restart;
++ _machine_halt = ar7_machine_halt;
++ _machine_power_off = ar7_machine_power_off;
++}
+diff -urN kernel-base/arch/mips/ar7/setup.c kernel-current/arch/mips/ar7/setup.c
+--- kernel-base/arch/mips/ar7/setup.c 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/setup.c 2005-07-10 06:40:39.588266256 +0200
+@@ -0,0 +1,120 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ */
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/mc146818rtc.h>
++#include <linux/ioport.h>
++
++#include <asm/cpu.h>
++#include <asm/bootinfo.h>
++#include <asm/irq.h>
++#include <asm/mips-boards/generic.h>
++#include <asm/mips-boards/prom.h>
++
++#include <asm/dma.h>
++#include <asm/time.h>
++#include <asm/traps.h>
++
++#ifdef CONFIG_KGDB
++extern void rs_kgdb_hook(int);
++int remote_debug = 0;
++#endif
++
++extern struct rtc_ops no_rtc_ops;
++
++extern void ar7_reboot_setup(void);
++
++extern void ar7_time_init(void);
++extern void ar7_timer_setup(struct irqaction *irq);
++
++const char *get_system_type(void)
++{
++ return "Texas Instruments AR7";
++}
++
++void __init ar7_setup(void)
++{
++#ifdef CONFIG_KGDB
++ int rs_putDebugChar(char);
++ char rs_getDebugChar(void);
++ extern int (*generic_putDebugChar)(char);
++ extern char (*generic_getDebugChar)(void);
++#endif
++ char *argptr;
++#ifdef CONFIG_SERIAL_CONSOLE
++ argptr = prom_getcmdline();
++ if ((argptr = strstr(argptr, "console=")) == NULL) {
++ char console[20];
++ char *s;
++ int i = 0;
++
++ s = prom_getenv("modetty0");
++ strcpy(console, "38400");
++
++ if (s != NULL) {
++ while (s[i] >= '0' && s[i] <= '9')
++ i++;
++
++ if (i > 0) {
++ strncpy(console, s, i);
++ console[i] = 0;
++ }
++ }
++
++ argptr = prom_getcmdline();
++ strcat(argptr, " console=ttyS0,");
++ strcat(argptr, console);
++ }
++#endif
++
++#ifdef CONFIG_KGDB
++ argptr = prom_getcmdline();
++ if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
++ int line;
++ argptr += strlen("kgdb=ttyS");
++ if (*argptr != '0' && *argptr != '1')
++ printk("KGDB: Uknown serial line /dev/ttyS%c, "
++ "falling back to /dev/ttyS1\n", *argptr);
++ line = *argptr == '0' ? 0 : 1;
++ printk("KGDB: Using serial line /dev/ttyS%d for session\n",
++ line ? 1 : 0);
++
++ rs_kgdb_hook(line);
++ generic_putDebugChar = rs_putDebugChar;
++ generic_getDebugChar = rs_getDebugChar;
++
++ prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
++ "please connect your debugger\n", line ? 1 : 0);
++
++ remote_debug = 1;
++ /* Breakpoints are in init_IRQ() */
++ }
++#endif
++
++ argptr = prom_getcmdline();
++ if ((argptr = strstr(argptr, "nofpu")) != NULL)
++ cpu_data[0].options &= ~MIPS_CPU_FPU;
++
++ rtc_ops = &no_rtc_ops;
++
++ ar7_reboot_setup();
++
++ board_time_init = ar7_time_init;
++ board_timer_setup = ar7_timer_setup;
++}
+diff -urN kernel-base/arch/mips/ar7/time.c kernel-current/arch/mips/ar7/time.c
+--- kernel-base/arch/mips/ar7/time.c 1970-01-01 01:00:00.000000000 +0100
++++ kernel-current/arch/mips/ar7/time.c 2005-07-10 06:40:39.588266256 +0200
+@@ -0,0 +1,125 @@
++/*
++ * Carsten Langgaard, carstenl@mips.com
++ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ * Setting up the clock on the MIPS boards.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/kernel_stat.h>
++#include <linux/sched.h>
++#include <linux/spinlock.h>
++
++#include <asm/mipsregs.h>
++#include <asm/ptrace.h>
++#include <asm/hardirq.h>
++#include <asm/div64.h>
++
++#include <linux/interrupt.h>
++#include <linux/mc146818rtc.h>
++#include <linux/timex.h>
++
++#include <asm/mips-boards/generic.h>
++#include <asm/mips-boards/prom.h>
++#include <asm/ar7/ar7.h>
++
++extern asmlinkage void mipsIRQ(void);
++
++static unsigned long r4k_offset; /* Amount to increment compare reg each time */
++static unsigned long r4k_cur; /* What counter should be at next timer irq */
++
++#define MIPS_CPU_TIMER_IRQ 7
++#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
++
++static inline void ack_r4ktimer(unsigned long newval)
++{
++ write_c0_compare(newval);
++}
++
++void ar7_timer_interrupt(struct pt_regs *regs)
++{
++ int cpu = smp_processor_id();
++
++ irq_enter(cpu, MIPS_CPU_TIMER_IRQ);
++
++ if (r4k_offset == 0)
++ goto null;
++
++ do {
++ kstat.irqs[cpu][MIPS_CPU_TIMER_IRQ]++;
++ do_timer(regs);
++ r4k_cur += r4k_offset;
++ ack_r4ktimer(r4k_cur);
++
++ } while (((unsigned long)read_c0_count()
++ - r4k_cur) < 0x7fffffff);
++
++ irq_exit(cpu, MIPS_CPU_TIMER_IRQ);
++
++ if (softirq_pending(cpu))
++ do_softirq();
++
++ return;
++
++null:
++ ack_r4ktimer(0);
++}
++
++/*
++ * Figure out the r4k offset, the amount to increment the compare
++ * register for each time tick.
++ */
++static unsigned long __init cal_r4koff(void)
++{
++ return ((CONFIG_AR7_CPU_FREQUENCY*500000)/HZ);
++}
++
++void __init ar7_time_init(void)
++{
++ unsigned long flags;
++ unsigned int est_freq;
++
++ set_except_vector(0, mipsIRQ);
++ write_c0_count(0);
++
++ printk("calculating r4koff... ");
++ r4k_offset = cal_r4koff();
++ printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
++
++ est_freq = 2*r4k_offset*HZ;
++ est_freq += 5000; /* round */
++ est_freq -= est_freq%10000;
++ printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
++ (est_freq%1000000)*100/1000000);
++}
++
++void __init ar7_timer_setup(struct irqaction *irq)
++{
++ /* we are using the cpu counter for timer interrupts */
++ irq->handler = no_action; /* we use our own handler */
++ setup_irq(MIPS_CPU_TIMER_IRQ, irq);
++
++ r4k_cur = (read_c0_count() + r4k_offset);
++ write_c0_compare(r4k_cur);
++ set_c0_status(ALLINTS);
++}
+diff -urN kernel-base/arch/mips/config-shared.in kernel-current/arch/mips/config-shared.in
+--- kernel-base/arch/mips/config-shared.in 2005-07-10 03:00:44.784181376 +0200
++++ kernel-current/arch/mips/config-shared.in 2005-07-10 06:40:39.589266104 +0200
+@@ -20,6 +20,16 @@
+ mainmenu_option next_comment
+ comment 'Machine selection'
+ dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
++dep_bool 'Support for Texas Instruments AR7 (EXPERIMENTAL)' CONFIG_AR7 $CONFIG_MIPS32 $CONFIG_EXPERIMENTAL
++if [ "$CONFIG_AR7" = "y" ]; then
++ choice 'Texas Instruments Reference Platform' \
++ "AR7DB CONFIG_AR7DB \
++ AR7RD CONFIG_AR7RD \
++ AR7WRD CONFIG_AR7WRD" AR7DB
++ int 'Texas Instruments AR7 CPU Frequency' CONFIG_AR7_CPU_FREQUENCY 150
++ int 'Texas Instruments AR7 System Frequency' CONFIG_AR7_SYS_FREQUENCY 125
++ hex 'Texas Instruments AR7 SDRAM Start' CONFIG_AR7_MEMORY 0x14000000
++fi
+ dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
+ dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
+ dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
+@@ -239,6 +249,11 @@
+ define_bool CONFIG_NONCOHERENT_IO y
+ define_bool CONFIG_PC_KEYB y
+ fi
++if [ "$CONFIG_AR7" = "y" ]; then
++ define_bool CONFIG_NONCOHERENT_IO y
++ define_bool CONFIG_SWAP_IO_SPACE y
++ define_bool CONFIG_AR7_PAGING y
++fi
+ if [ "$CONFIG_CASIO_E55" = "y" ]; then
+ define_bool CONFIG_IRQ_CPU y
+ define_bool CONFIG_NONCOHERENT_IO y
+@@ -736,6 +751,7 @@
+ mainmenu_option next_comment
+ comment 'General setup'
+ if [ "$CONFIG_ACER_PICA_61" = "y" -o \
++ "$CONFIG_AR7" = "y" -o \
+ "$CONFIG_CASIO_E55" = "y" -o \
+ "$CONFIG_DDB5074" = "y" -o \
+ "$CONFIG_DDB5476" = "y" -o \
+@@ -797,6 +813,7 @@
+ bool 'Networking support' CONFIG_NET
+
+ if [ "$CONFIG_ACER_PICA_61" = "y" -o \
++ "$CONFIG_AR7" = "y" -o \
+ "$CONFIG_CASIO_E55" = "y" -o \
+ "$CONFIG_DECSTATION" = "y" -o \
+ "$CONFIG_IBM_WORKPAD" = "y" -o \
+diff -urN kernel-base/arch/mips/kernel/irq.c kernel-current/arch/mips/kernel/irq.c
+--- kernel-base/arch/mips/kernel/irq.c 2005-07-10 03:00:44.784181376 +0200
++++ kernel-current/arch/mips/kernel/irq.c 2005-07-10 06:40:39.589266104 +0200
+@@ -76,6 +76,7 @@
+ * Generic, controller-independent functions:
+ */
+
++#ifndef CONFIG_AR7
+ int get_irq_list(char *buf)
+ {
+ int i, j;
+@@ -110,6 +111,7 @@
+ p += sprintf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
+ return p - buf;
+ }
++#endif
+
+ #ifdef CONFIG_SMP
+ int global_irq_holder = NO_PROC_ID;