--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -165,14 +165,15 @@
+@@ -165,14 +165,15 @@ struct port {
struct net_device *netdev;
struct napi_struct napi;
struct net_device_stats stat;
};
/* NPE message structure */
-@@ -316,12 +317,13 @@
+@@ -316,12 +317,13 @@ static void mdio_write(struct net_device
spin_unlock_irqrestore(&mdio_lock, flags);
}
while (cycles < MAX_MII_RESET_RETRIES) {
if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-@@ -335,12 +337,12 @@
+@@ -335,12 +337,12 @@ static void phy_reset(struct net_device
cycles++;
}
__raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
&port->regs->tx_control[0]);
else
-@@ -348,7 +350,7 @@
+@@ -348,7 +350,7 @@ static void eth_set_duplex(struct port *
&port->regs->tx_control[0]);
}
static void phy_check_media(struct port *port, int init)
{
if (mii_check_media(&port->mii, 1, init))
-@@ -367,7 +369,63 @@
+@@ -367,7 +369,63 @@ static void phy_check_media(struct port
}
}
}
static void mdio_thread(struct work_struct *work)
{
-@@ -791,9 +849,12 @@
+@@ -791,9 +849,12 @@ static int eth_ioctl(struct net_device *
if (!netif_running(dev))
return -EINVAL;
return err;
}
-@@ -946,7 +1007,8 @@
+@@ -946,7 +1007,8 @@ static int eth_open(struct net_device *d
}
}
memset(&msg, 0, sizeof(msg));
msg.cmd = NPE_VLAN_SETRXQOSENTRY;
-@@ -1106,10 +1168,8 @@
+@@ -1106,10 +1168,8 @@ static int eth_close(struct net_device *
printk(KERN_CRIT "%s: unable to disable loopback\n",
dev->name);
if (!ports_open)
qmgr_disable_irq(TXDONE_QUEUE);
-@@ -1119,6 +1179,42 @@
+@@ -1119,6 +1179,42 @@ static int eth_close(struct net_device *
return 0;
}
static int __devinit eth_init_one(struct platform_device *pdev)
{
struct port *port;
-@@ -1191,20 +1287,7 @@
+@@ -1191,20 +1287,7 @@ static int __devinit eth_init_one(struct
__raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
udelay(50);
return 0;
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
-@@ -95,12 +95,15 @@
+@@ -95,12 +95,15 @@ struct sys_timer;
#define IXP4XX_ETH_NPEB 0x10
#define IXP4XX_ETH_NPEC 0x20