/*
- * $Id$
- *
* ADM5120 interrupt controller definitions
*
* This header file defines the hardware registers of the ADM5120 SoC
* built-in interrupt controller.
*
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
*
*/
-#ifndef _ADM5120_INTC_H_
-#define _ADM5120_INTC_H_
+#ifndef _MACH_ADM5120_INTC_H
+#define _MACH_ADM5120_INTC_H
/*
* INTC register offsets
#define INTC_INT_SWITCH ( 1 << INTC_IRQ_SWITCH )
#define INTC_INT_ALL (( 1 << INTC_IRQ_COUNT)-1)
-#endif /* _ADM5120_INTC_H_ */
+#endif /* _MACH_ADM5120_INTC_H */