ar71xx: add ar71xx_device_reset_rmw helper

[openwrt.git] / target / linux / ar71xx / files / arch / mips / include / asm / mach-ar71xx / ar71xx.h

diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 7c99dba..ec5e0bb 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -138,6 +138,7 @@ enum ar71xx_soc_type {
        AR71XX_SOC_AR9342,
        AR71XX_SOC_AR9344,
 };
+extern u32 ar71xx_soc_rev;
 
 extern enum ar71xx_soc_type ar71xx_soc;
 
@@ -608,6 +609,7 @@ void ar71xx_ddr_flush(u32 reg);
 
 #define AR933X_RESET_REG_RESET_MODULE          0x1c
 #define AR933X_RESET_REG_BOOTSTRAP             0xac
+#define AR933X_BOOTSTRAP_EEPBUSY               BIT(4)
 #define AR933X_BOOTSTRAP_REF_CLK_40            BIT(0)
 
 #define AR934X_RESET_REG_RESET_MODULE          0x1c
@@ -671,6 +673,7 @@ void ar71xx_ddr_flush(u32 reg);
 #define AR724X_RESET_USB_PHY           BIT(4)
 #define AR724X_RESET_USBSUS_OVERRIDE   BIT(3)
 
+#define AR933X_RESET_WMAC              BIT(11)
 #define AR933X_RESET_GE1_MDIO          BIT(23)
 #define AR933X_RESET_GE0_MDIO          BIT(22)
 #define AR933X_RESET_GE1_MAC           BIT(13)
@@ -721,6 +724,7 @@ static inline u32 ar71xx_reset_rr(unsigned reg)
 
 void ar71xx_device_stop(u32 mask);
 void ar71xx_device_start(u32 mask);
+void ar71xx_device_reset_rmw(u32 clear, u32 set);
 int ar71xx_device_stopped(u32 mask);
 
 /*