don't try to create mtd partitions on bcm947xx when the trx header is not found ...

[openwrt.git] / target / linux / aruba-2.6 / patches / 002-irq.patch

diff --git a/target/linux/aruba-2.6/patches/002-irq.patch b/target/linux/aruba-2.6/patches/002-irq.patch
index 94e68cf..101ed78 100644 (file)
--- a/target/linux/aruba-2.6/patches/002-irq.patch
+++ b/target/linux/aruba-2.6/patches/002-irq.patch
@@ -1,98 +1,7 @@
-diff -Nur linux-2.6.15/arch/mips/aruba/idtIRQ.S linux-2.6.15-openwrt/arch/mips/aruba/idtIRQ.S
---- linux-2.6.15/arch/mips/aruba/idtIRQ.S      1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.15-openwrt/arch/mips/aruba/idtIRQ.S      2006-01-10 00:32:32.000000000 +0100
-@@ -0,0 +1,87 @@
-+/**************************************************************************
-+ *
-+ *  BRIEF MODULE DESCRIPTION
-+ *     Intterrupt dispatcher code for IDT boards
-+ *
-+ *  Copyright 2004 IDT Inc. (rischelp@idt.com)
-+ *         
-+ *  This program is free software; you can redistribute  it and/or modify it
-+ *  under  the terms of  the GNU General  Public License as published by the
-+ *  Free Software Foundation;  either version 2 of the  License, or (at your
-+ *  option) any later version.
-+ *
-+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
-+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
-+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
-+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
-+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
-+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
-+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *  You should have received a copy of the  GNU General Public License along
-+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
-+ *  675 Mass Ave, Cambridge, MA 02139, USA.
-+ *
-+ *
-+ **************************************************************************
-+ * May 2004 rkt, neb
-+ *
-+ * Initial Release
-+ *
-+ * 
-+ *
-+ **************************************************************************
-+ */
-+              
-+      
-+#include <asm/asm.h>
-+#include <asm/mipsregs.h>
-+#include <asm/regdef.h>
-+#include <asm/stackframe.h>
-+
-+      .text
-+      .set    noreorder
-+      .set    noat
-+      .align  5
-+      NESTED(idtIRQ, PT_SIZE, sp)
-+      .set noat
-+      SAVE_ALL
-+      CLI
-+
-+      .set    at
-+      .set    noreorder
-+
-+      /* Get the pending interrupts */
-+      mfc0    t0, CP0_CAUSE
-+      nop
-+                       
-+      /* Isolate the allowed ones by anding the irq mask */
-+      mfc0    t2, CP0_STATUS
-+      move    a1, sp          /* need a nop here, hence we anticipate */
-+      andi    t0, CAUSEF_IP
-+      and     t0, t2
-+                                                                
-+      /* check for r4k counter/timer IRQ. */
-+      
-+      andi    t1, t0, CAUSEF_IP7
-+      beqz    t1, 1f
-+      nop
-+
-+      jal     aruba_timer_interrupt   
-+
-+      li      a0, 7
-+
-+      j       ret_from_irq
-+      nop
-+1:
-+      jal     aruba_irqdispatch
-+      move    a0, t0
-+      j       ret_from_irq
-+      nop
-+
-+      END(idtIRQ)
-+
-+
-diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/aruba/irq.c
---- linux-2.6.15/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.15-openwrt/arch/mips/aruba/irq.c 2006-01-10 00:32:32.000000000 +0100
-@@ -0,0 +1,447 @@
+diff -Nur linux-2.6.17/arch/mips/aruba/irq.c linux-2.6.17-openwrt/arch/mips/aruba/irq.c
+--- linux-2.6.17/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.17-openwrt/arch/mips/aruba/irq.c 2006-01-10 00:32:32.000000000 +0100
+@@ -0,0 +1,433 @@

 +/**************************************************************************
 + *
 + *  BRIEF MODULE DESCRIPTION
 +/**************************************************************************
 + *
 + *  BRIEF MODULE DESCRIPTION


@@ -164,7 +73,7 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +#define DPRINTK(fmt, args...)
 +#endif
 +
 +#define DPRINTK(fmt, args...)
 +#endif
 +

-+extern asmlinkage void idtIRQ(void);
++extern void aruba_timer_interrupt(struct pt_regs *regs);

 +static unsigned int startup_irq(unsigned int irq);
 +static void end_irq(unsigned int irq_nr);
 +static void mask_and_ack_irq(unsigned int irq_nr);
 +static unsigned int startup_irq(unsigned int irq);
 +static void end_irq(unsigned int irq_nr);
 +static void mask_and_ack_irq(unsigned int irq_nr);


@@ -183,8 +92,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +};
 +
 +#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))
 +};
 +
 +#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))

-+#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003010 + 4)))
-+#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)((0xbc003010) + 4))) = (val))
++#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003014)))
++#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)(0xbc003014))) = (val), READ_MASK_MERLOT())

 +
 +static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
 +      {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},
 +
 +static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
 +      {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},


@@ -224,21 +133,14 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +
 +static inline void enable_local_irq(unsigned int ip)
 +{
 +
 +static inline void enable_local_irq(unsigned int ip)
 +{

-+      int ipnum = 0x100 << ip;
-+      clear_c0_cause(ipnum);
-+      set_c0_status(ipnum);
++      set_c0_status(0x100 << ip);
++      irq_enable_hazard();

 +}
 +
 +static inline void disable_local_irq(unsigned int ip)
 +{
 +}
 +
 +static inline void disable_local_irq(unsigned int ip)
 +{

-+      int ipnum = 0x100 << ip;
-+      clear_c0_status(ipnum);
-+}
-+
-+static inline void ack_local_irq(unsigned int ip)
-+{
-+      int ipnum = 0x100 << ip;
-+      clear_c0_cause(ipnum);
++      clear_c0_status(0x100 << ip);
++      irq_disable_hazard();

 +}
 +
 +static void aruba_enable_irq(unsigned int irq_nr)
 +}
 +
 +static void aruba_enable_irq(unsigned int irq_nr)


@@ -270,9 +172,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +              ip -= (group << 5);
 +              intr_bit = 1 << ip;
 +
 +              ip -= (group << 5);
 +              intr_bit = 1 << ip;
 +

-+              // first enable the IP mapped to this IRQ
-+              enable_local_irq(group_to_ip(group));
-+

 +              switch (mips_machtype) {
 +                      case MACH_ARUBA_AP70:
 +                              addr = intr_group_muscat[group].base_addr;
 +              switch (mips_machtype) {
 +                      case MACH_ARUBA_AP70:
 +                              addr = intr_group_muscat[group].base_addr;


@@ -285,8 +184,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
 +                              break;
 +              }
 +                              WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
 +                              break;
 +              }

++              enable_local_irq(group_to_ip(group));

 +      }
 +
 +      }
 +

++      back_to_back_c0_hazard();

 +      local_irq_restore(flags);
 +
 +}
 +      local_irq_restore(flags);
 +
 +}


@@ -341,15 +242,15 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              // mask intr within group
 +                              mask = READ_MASK_MERLOT(addr);
 +                              mask &= ~intr_bit;
 +                              // mask intr within group
 +                              mask = READ_MASK_MERLOT(addr);
 +                              mask &= ~intr_bit;

-+                              WRITE_MASK_MERLOT(addr, mask);
-+                              if (READ_MASK_MERLOT(addr))
++                              if (!mask)

 +                                      disable_local_irq(group_to_ip(group));
 +                                      disable_local_irq(group_to_ip(group));

++                              WRITE_MASK_MERLOT(addr, mask);

 +                              break;
 +              }
 +      }
 +
 +                              break;
 +              }
 +      }
 +

++      back_to_back_c0_hazard();

 +      local_irq_restore(flags);
 +      local_irq_restore(flags);

-+

 +}
 +
 +static unsigned int startup_irq(unsigned int irq_nr)
 +}
 +
 +static unsigned int startup_irq(unsigned int irq_nr)


@@ -361,29 +262,31 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +static void shutdown_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);
 +static void shutdown_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);

-+      return;

 +}
 +
 +static void mask_and_ack_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);
 +}
 +
 +static void mask_and_ack_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);

-+      ack_local_irq(group_to_ip(irq_to_group(irq_nr)));

 +}
 +
 +static void end_irq(unsigned int irq_nr)
 +{
 +
 +}
 +
 +static void end_irq(unsigned int irq_nr)
 +{
 +

-+      unsigned long flags;

 +      int ip = irq_nr - GROUP0_IRQ_BASE;
 +      unsigned int intr_bit, group;
 +      volatile unsigned int *addr;
 +
 +
 +      int ip = irq_nr - GROUP0_IRQ_BASE;
 +      unsigned int intr_bit, group;
 +      volatile unsigned int *addr;
 +
 +

-+      local_irq_save(flags);

 +      if (irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)) {
 +              printk("warning: end_irq %d did not enable (%x)\n",
 +                     irq_nr, irq_desc[irq_nr].status);
 +      if (irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)) {
 +              printk("warning: end_irq %d did not enable (%x)\n",
 +                     irq_nr, irq_desc[irq_nr].status);

-+      } else if (ip<0) {
++              /* fall through; enable the interrupt
++               * -- It'll get stuck otherwise
++               */
++
++      } 
++
++      if (ip<0) {

 +              enable_local_irq(irq_nr);
 +      } else {
 +
 +              enable_local_irq(irq_nr);
 +      } else {
 +


@@ -409,7 +312,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              break;
 +
 +                      case MACH_ARUBA_AP65:
 +                              break;
 +
 +                      case MACH_ARUBA_AP65:

-+                              case MACH_ARUBA_AP60:
++                      case MACH_ARUBA_AP60:
++                      default:

 +                              group = 0;
 +      
 +                              // calc interrupt bit within group
 +                              group = 0;
 +      
 +                              // calc interrupt bit within group


@@ -424,11 +328,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              break;
 +              }
 +      }
 +                              break;
 +              }
 +      }

-+      local_irq_restore(flags);

 +}
 +
 +static struct hw_interrupt_type aruba_irq_type = {
 +}
 +
 +static struct hw_interrupt_type aruba_irq_type = {

-+      .typename = "IDT434",
++      .typename = "ARUBA",

 +      .startup = startup_irq,
 +      .shutdown = shutdown_irq,
 +      .enable = aruba_enable_irq,
 +      .startup = startup_irq,
 +      .shutdown = shutdown_irq,
 +      .enable = aruba_enable_irq,


@@ -442,8 +345,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +      int i;
 +      printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
 +      memset(irq_desc, 0, sizeof(irq_desc));
 +      int i;
 +      printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
 +      memset(irq_desc, 0, sizeof(irq_desc));

-+      set_except_vector(0, idtIRQ);
-+

 +
 +      set_c0_status(0xFF00);
 +
 +
 +      set_c0_status(0xFF00);
 +


@@ -454,28 +355,22 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +              irq_desc[i].handler = &aruba_irq_type;
 +              spin_lock_init(&irq_desc[i].lock);
 +      }
 +              irq_desc[i].handler = &aruba_irq_type;
 +              spin_lock_init(&irq_desc[i].lock);
 +      }

-+
-+      switch (mips_machtype) {
-+              case MACH_ARUBA_AP70:
-+                      break;
-+              case MACH_ARUBA_AP65:
-+              case MACH_ARUBA_AP60:
-+              default:
-+                      WRITE_MASK_MERLOT(intr_group_merlot[0].base_addr, 0);
-+                      *((volatile unsigned long *)0xbc003014) = 0x10;
-+                      break;
-+      }

 +}
 +
 +/* Main Interrupt dispatcher */
 +}
 +
 +/* Main Interrupt dispatcher */

-+void aruba_irqdispatch(unsigned long cp0_cause, struct pt_regs *regs)
++
++void plat_irq_dispatch(struct pt_regs *regs)

 +{
 +      unsigned int pend, group, ip;
 +      volatile unsigned int *addr;
 +{
 +      unsigned int pend, group, ip;
 +      volatile unsigned int *addr;

++      unsigned long cp0_cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
++
++      if (cp0_cause & CAUSEF_IP7)
++              return aruba_timer_interrupt(regs);

 +
 +      if(cp0_cause == 0) {
 +              printk("INTERRUPT(S) FIRED WHILE MASKED\n");
 +
 +      if(cp0_cause == 0) {
 +              printk("INTERRUPT(S) FIRED WHILE MASKED\n");

-+
++#ifdef ARUBA_DEBUG

 +              // debuging use -- figure out which interrupt(s) fired
 +              cp0_cause = read_c0_cause() & CAUSEF_IP;
 +              while (cp0_cause) {
 +              // debuging use -- figure out which interrupt(s) fired
 +              cp0_cause = read_c0_cause() & CAUSEF_IP;
 +              while (cp0_cause) {


@@ -486,11 +381,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                      printk(" ---> MASKED IRQ %d\n",irq_nr);
 +                      cp0_cause &= ~(1 << intr_bit);
 +              }
 +                      printk(" ---> MASKED IRQ %d\n",irq_nr);
 +                      cp0_cause &= ~(1 << intr_bit);
 +              }

-+
++#endif

 +              return;
 +      }
 +
 +              return;
 +      }
 +

-+      

 +      switch (mips_machtype) {
 +              case MACH_ARUBA_AP70:
 +                      if ((ip = (cp0_cause & 0x7c00))) {
 +      switch (mips_machtype) {
 +              case MACH_ARUBA_AP70:
 +                      if ((ip = (cp0_cause & 0x7c00))) {


@@ -514,7 +408,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              pend = READ_PEND_MERLOT(addr);
 +                              pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
 +                              /* handle one misc interrupt at a time */
 +                              pend = READ_PEND_MERLOT(addr);
 +                              pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
 +                              /* handle one misc interrupt at a time */

-+                              while (pend) {
++                              while (pend)
++                              {

 +                                      unsigned long intr_bit;
 +                                      unsigned int irq_nr;
 +
 +                                      unsigned long intr_bit;
 +                                      unsigned int irq_nr;
 +


@@ -524,9 +419,9 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                                      do_IRQ(irq_nr, regs);
 +                                      pend &= ~(1 << intr_bit);
 +                              }
 +                                      do_IRQ(irq_nr, regs);
 +                                      pend &= ~(1 << intr_bit);
 +                              }

-+                      }
-+                      if (cp0_cause & 0x3c00) { // irq 2-5
-+                              while (cp0_cause) {
++                      } else if (cp0_cause & 0x3c00) { // irq 2-5
++                              while (cp0_cause)
++                              {

 +                                      unsigned long intr_bit;
 +                                      unsigned int irq_nr;
 +
 +                                      unsigned long intr_bit;
 +                                      unsigned int irq_nr;
 +