#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
-#include <linux/rtl8366rb.h>
+#include <linux/rtl8366.h>
#include "rtl8366_smi.h"
#define RTL8366RB_PHY_NO_MAX 4
#define RTL8366RB_PHY_PAGE_MAX 7
#define RTL8366RB_PHY_ADDR_MAX 31
-#define RTL8366RB_PHY_WAN 4
/* Switch Global Configuration register */
#define RTL8366RB_SGCR 0x0000
int timeout = 10;
u32 data;
- rtl8366_smi_write_reg(smi, RTL8366RB_RESET_CTRL_REG,
- RTL8366RB_CHIP_CTRL_RESET_HW);
+ rtl8366_smi_write_reg_noack(smi, RTL8366RB_RESET_CTRL_REG,
+ RTL8366RB_CHIP_CTRL_RESET_HW);
do {
msleep(1);
if (rtl8366_smi_read_reg(smi, RTL8366RB_RESET_CTRL_REG, &data))
return 0;
}
-
-static const char *rtl8366rb_speed_str(unsigned speed)
-{
- switch (speed) {
- case 0:
- return "10baseT";
- case 1:
- return "100baseT";
- case 2:
- return "1000baseT";
- }
-
- return "unknown";
-}
-
static int rtl8366rb_sw_get_port_link(struct switch_dev *dev,
- const struct switch_attr *attr,
- struct switch_val *val)
+ int port,
+ struct switch_port_link *link)
{
struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
- u32 len = 0, data = 0;
+ u32 data = 0;
+ u32 speed;
- if (val->port_vlan >= RTL8366RB_NUM_PORTS)
+ if (port >= RTL8366RB_NUM_PORTS)
return -EINVAL;
- memset(smi->buf, '\0', sizeof(smi->buf));
- rtl8366_smi_read_reg(smi, RTL8366RB_PORT_LINK_STATUS_BASE +
- (val->port_vlan / 2), &data);
+ rtl8366_smi_read_reg(smi, RTL8366RB_PORT_LINK_STATUS_BASE + (port / 2),
+ &data);
- if (val->port_vlan % 2)
+ if (port % 2)
data = data >> 8;
- if (data & RTL8366RB_PORT_STATUS_LINK_MASK) {
- len = snprintf(smi->buf, sizeof(smi->buf),
- "port:%d link:up speed:%s %s-duplex %s%s%s",
- val->port_vlan,
- rtl8366rb_speed_str(data &
- RTL8366RB_PORT_STATUS_SPEED_MASK),
- (data & RTL8366RB_PORT_STATUS_DUPLEX_MASK) ?
- "full" : "half",
- (data & RTL8366RB_PORT_STATUS_TXPAUSE_MASK) ?
- "tx-pause ": "",
- (data & RTL8366RB_PORT_STATUS_RXPAUSE_MASK) ?
- "rx-pause " : "",
- (data & RTL8366RB_PORT_STATUS_AN_MASK) ?
- "nway ": "");
- } else {
- len = snprintf(smi->buf, sizeof(smi->buf), "port:%d link: down",
- val->port_vlan);
- }
+ link->link = !!(data & RTL8366RB_PORT_STATUS_LINK_MASK);
+ if (!link->link)
+ return 0;
- val->value.s = smi->buf;
- val->len = len;
+ link->duplex = !!(data & RTL8366RB_PORT_STATUS_DUPLEX_MASK);
+ link->rx_flow = !!(data & RTL8366RB_PORT_STATUS_RXPAUSE_MASK);
+ link->tx_flow = !!(data & RTL8366RB_PORT_STATUS_TXPAUSE_MASK);
+ link->aneg = !!(data & RTL8366RB_PORT_STATUS_AN_MASK);
+
+ speed = (data & RTL8366RB_PORT_STATUS_SPEED_MASK);
+ switch (speed) {
+ case 0:
+ link->speed = SWITCH_PORT_SPEED_10;
+ break;
+ case 1:
+ link->speed = SWITCH_PORT_SPEED_100;
+ break;
+ case 2:
+ link->speed = SWITCH_PORT_SPEED_1000;
+ break;
+ default:
+ link->speed = SWITCH_PORT_SPEED_UNKNOWN;
+ break;
+ }
return 0;
}
static struct switch_attr rtl8366rb_port[] = {
{
- .type = SWITCH_TYPE_STRING,
- .name = "link",
- .description = "Get port link information",
- .max = 1,
- .set = NULL,
- .get = rtl8366rb_sw_get_port_link,
- }, {
.type = SWITCH_TYPE_NOVAL,
.name = "reset_mib",
.description = "Reset single port MIB counters",
.get_port_pvid = rtl8366_sw_get_port_pvid,
.set_port_pvid = rtl8366_sw_set_port_pvid,
.reset_switch = rtl8366rb_sw_reset_switch,
+ .get_port_link = rtl8366rb_sw_get_port_link,
};
static int rtl8366rb_switch_init(struct rtl8366_smi *smi)
dev->ports = RTL8366RB_NUM_PORTS;
dev->vlans = RTL8366RB_NUM_VIDS;
dev->ops = &rtl8366_ops;
- dev->devname = dev_name(smi->parent);
+ dev->alias = dev_name(smi->parent);
err = register_switch(dev, NULL);
if (err)
return err;
}
-static int rtl8366rb_mii_bus_match(struct mii_bus *bus)
-{
- return (bus->read == rtl8366rb_mii_read &&
- bus->write == rtl8366rb_mii_write);
-}
-
static int rtl8366rb_setup(struct rtl8366_smi *smi)
{
int ret;
static int __devinit rtl8366rb_probe(struct platform_device *pdev)
{
static int rtl8366_smi_version_printed;
- struct rtl8366rb_platform_data *pdata;
+ struct rtl8366_platform_data *pdata;
struct rtl8366_smi *smi;
int err;
smi->gpio_sda = pdata->gpio_sda;
smi->gpio_sck = pdata->gpio_sck;
+ smi->clk_delay = 10;
+ smi->cmd_read = 0xa9;
+ smi->cmd_write = 0xa8;
smi->ops = &rtl8366rb_smi_ops;
smi->cpu_port = RTL8366RB_PORT_NUM_CPU;
smi->num_ports = RTL8366RB_NUM_PORTS;
return err;
}
-static int rtl8366rb_phy_config_init(struct phy_device *phydev)
-{
- if (!rtl8366rb_mii_bus_match(phydev->bus))
- return -EINVAL;
-
- return 0;
-}
-
-static int rtl8366rb_phy_config_aneg(struct phy_device *phydev)
-{
- /* phy 4 might be connected to a second mac, allow aneg config */
- if (phydev->addr == RTL8366RB_PHY_WAN)
- return genphy_config_aneg(phydev);
-
- return 0;
-}
-
-static struct phy_driver rtl8366rb_phy_driver = {
- .phy_id = 0x001cc960,
- .name = "Realtek RTL8366RB",
- .phy_id_mask = 0x1ffffff0,
- .features = PHY_GBIT_FEATURES,
- .config_aneg = rtl8366rb_phy_config_aneg,
- .config_init = rtl8366rb_phy_config_init,
- .read_status = genphy_read_status,
- .driver = {
- .owner = THIS_MODULE,
- },
-};
-
static int __devexit rtl8366rb_remove(struct platform_device *pdev)
{
struct rtl8366_smi *smi = platform_get_drvdata(pdev);
static int __init rtl8366rb_module_init(void)
{
- int ret;
- ret = platform_driver_register(&rtl8366rb_driver);
- if (ret)
- return ret;
-
- ret = phy_driver_register(&rtl8366rb_phy_driver);
- if (ret)
- goto err_platform_unregister;
-
- return 0;
-
- err_platform_unregister:
- platform_driver_unregister(&rtl8366rb_driver);
- return ret;
+ return platform_driver_register(&rtl8366rb_driver);
}
module_init(rtl8366rb_module_init);
static void __exit rtl8366rb_module_exit(void)
{
- phy_driver_unregister(&rtl8366rb_phy_driver);
platform_driver_unregister(&rtl8366rb_driver);
}
module_exit(rtl8366rb_module_exit);
projects / openwrt.git / blobdiff