[ar7] refresh and refine 972-cpmac_multi_probe.patch, patch from sn9

[openwrt.git] / target / linux / ar7 / patches-2.6.32 / 972-cpmac_multi_probe.patch

diff --git a/target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch b/target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch
index 44933d0..eb7ccb6 100644 (file)
--- a/target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch
+++ b/target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch
@@ -1,67 +1,246 @@
---- a/drivers/net/cpmac.c
-+++ b/drivers/net/cpmac.c
-@@ -33,6 +33,7 @@
- #include <linux/skbuff.h>
- #include <linux/mii.h>
- #include <linux/phy.h>
-+#include <linux/phy_fixed.h>
- #include <linux/platform_device.h>
- #include <linux/dma-mapping.h>
- #include <asm/gpio.h>
-@@ -217,6 +218,12 @@ static void cpmac_hw_stop(struct net_dev
- static int cpmac_stop(struct net_device *dev);
- static int cpmac_open(struct net_device *dev);
- 
-+static struct fixed_phy_status fixed_phy_status = {
-+      .link = 1,
-+      .speed = 100,
-+      .duplex = 1,
-+};
+Index: linux-2.6.32.26/arch/mips/ar7/platform.c
+===================================================================
+--- linux-2.6.32.26.orig/arch/mips/ar7/platform.c      2010-11-28 03:22:24.522383766 -0800
++++ linux-2.6.32.26/arch/mips/ar7/platform.c   2010-11-28 04:17:24.872413302 -0800
+@@ -46,7 +46,6 @@
+       int reset_bit;
+ };
+ 
+-
+ static int vlynq_on(struct vlynq_device *dev)
+ {
+       int result;
+@@ -72,7 +71,8 @@
+ 
+       msleep(50);
+ 
+-      gpio_set_value(pdata->gpio_bit, 1);
++      gpio_set_value(pdata->gpio_bit,
++                      __vlynq_rev_reg(dev->local) < 0x00010205);
+       msleep(50);
+ 
+       return 0;
+@@ -601,6 +601,18 @@
+       }
+ }
+ 
++static void auto_mdix_on(void)
++{
++      ar7_gpio_enable(28);
++      ar7_gpio_disable(30);
++}

 +
 +

- static void cpmac_dump_regs(struct net_device *dev)
++/*static void auto_mdix_off(void)
++{
++      ar7_gpio_disable(28);
++      ar7_gpio_disable(30);
++}*/
++
+ static void cpmac_get_mac(int instance, unsigned char *dev_addr)

  {
        int i;
  {
        int i;

-@@ -1122,12 +1129,39 @@ static int __devinit cpmac_probe(struct
-               strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
-               break;
+@@ -662,6 +674,7 @@
+       u16 chip_id;
+       int res;
+       u32 *bootcr, val;
++      void __iomem *mii_reg;
+ #ifdef CONFIG_SERIAL_8250
+       static struct uart_port uart_port[2];
+ 
+@@ -715,27 +728,6 @@
+                       return res;

        }
        }

--      
--      if (phy_id == PHY_MAX_ADDR) {
--              dev_err(&pdev->dev, "no PHY present\n");
--              return -ENODEV;
+ 
+-      if (ar7_has_high_cpmac()) {
+-              res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
+-                                              &fixed_phy_status);
+-              if (res && res != -ENODEV)
+-                      return res;
+-
+-              cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
+-                                              cpmac_high_data.dev_addr);
+-              res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
+-                                              &cpmac_high);
+-
+-              if (res)
+-                      return res;
+-      } else {
+-              if (ar7_is_titan())
+-                      cpmac_low_data_titan.phy_mask = 0xffffffff;
+-              else
+-                      cpmac_low_data.phy_mask = 0xffffffff;
+-
+-      }
+-
+       res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
+                       cpmac_low.id, &fixed_phy_status);
+       if (res && res != -ENODEV)
+@@ -748,6 +740,34 @@
+       if (res)
+               return res;
+ 
++      if (ar7_has_high_cpmac()) {
++              res = fixed_phy_add(PHY_POLL, ar7_is_titan() ?
++                              cpmac_high_titan.id : cpmac_high.id,
++                              &fixed_phy_status);
++              if (res && res != -ENODEV)
++                      return res;

 +
 +

-+      if (phy_id < PHY_MAX_ADDR)
-+              goto dev_alloc;
++              cpmac_get_mac(1, ar7_is_titan() ?
++                              cpmac_high_data_titan.dev_addr :
++                              cpmac_high_data.dev_addr);
++              res = platform_device_register(ar7_is_titan() ?
++                              &cpmac_high_titan : &cpmac_high);

 +
 +

-+      dev_info(&pdev->dev, "trying external MII\n");
-+      /* Now disable EPHY and enable MII */
-+      ar7_device_disable(AR7_RESET_BIT_EPHY);
-+      *(unsigned long*) ioremap(0x08611A08, 4) |= 0x00000001;
++              if (res)
++                      return res;
++      } else {
++              mii_reg = ioremap(AR7_REGS_MII, 4);
++              if (mii_reg) {
++                      writel(readl(mii_reg) | 1, mii_reg);
++                      iounmap(mii_reg);
++              }
++
++              ar7_gpio_disable(17);
++              mdelay(20);
++              ar7_gpio_enable(17);
++              auto_mdix_on();
++      }

 +
 +

-+      for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
-+              if (!(pdata->phy_mask & (1 << phy_id)))
+       detect_leds();
+       res = platform_device_register(&ar7_gpio_leds);
+       if (res)
+@@ -771,8 +791,10 @@
+       ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
+ 
+       bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
+-      val = *bootcr;
+-      iounmap(bootcr);
++      if (bootcr) {
++              val = *bootcr;
++              iounmap(bootcr);
++      }
+ 
+       /* Register watchdog only if enabled in hardware */
+       if (val & AR7_WDT_HW_ENA)
+Index: linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h
+===================================================================
+--- linux-2.6.32.26.orig/arch/mips/include/asm/mach-ar7/ar7.h  2010-11-28 03:22:24.522383766 -0800
++++ linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h       2010-11-28 03:22:25.012385426 -0800
+@@ -41,6 +41,7 @@
+ #define AR7_REGS_RESET        (AR7_REGS_BASE + 0x1600)
+ #define AR7_REGS_VLYNQ0       (AR7_REGS_BASE + 0x1800)
+ #define AR7_REGS_DCL  (AR7_REGS_BASE + 0x1a00)
++#define AR7_REGS_MII  (AR7_REGS_BASE + 0x1a08)
+ #define AR7_REGS_VLYNQ1       (AR7_REGS_BASE + 0x1c00)
+ #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
+ #define AR7_REGS_IRQ  (AR7_REGS_BASE + 0x2400)
+Index: linux-2.6.32.26/drivers/net/cpmac.c
+===================================================================
+--- linux-2.6.32.26.orig/drivers/net/cpmac.c   2010-11-28 03:22:24.982383427 -0800
++++ linux-2.6.32.26/drivers/net/cpmac.c        2010-11-28 05:23:59.482390691 -0800
+@@ -668,9 +668,8 @@
+       for (i = 0; i < 8; i++)
+               cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
+       cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
+-      cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
+-                  (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
+-                  (dev->dev_addr[3] << 24));
++      cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
++                      dev->dev_addr));
+       cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
+       cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
+       cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
+@@ -1104,8 +1103,6 @@
+       .ndo_set_mac_address    = eth_mac_addr,
+ };
+ 
+-static int external_switch;
+-
+ static int __devinit cpmac_probe(struct platform_device *pdev)
+ {
+       int rc, phy_id;
+@@ -1117,24 +1114,26 @@
+ 
+       pdata = pdev->dev.platform_data;
+ 
+-      if (external_switch || dumb_switch) {
+-              strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
+-              phy_id = pdev->id;
+-      } else {
+-              for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
+-                      if (!(pdata->phy_mask & (1 << phy_id)))
+-                              continue;
+-                      if (!cpmac_mii->phy_map[phy_id])
+-                              continue;
+-                      strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
+-                      break;
+-              }
++      if (dumb_switch)
++              phy_id = PHY_MAX_ADDR;
++      else for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
++              if (!((pdata->phy_mask | cpmac_mii->phy_mask) &
++                              (1 << phy_id)))

 +                      continue;
 +                      continue;

-+              if (!cpmac_mii->phy_map[phy_id])
++              if (cpmac_mii->phy_map[phy_id])

 +                      continue;
 +              strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
 +              break;
 +                      continue;
 +              strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
 +              break;

-+      }
-+
-+      if (phy_id < PHY_MAX_ADDR)
-+              goto dev_alloc;
-+
-+      /* This still does not work, so now we register a fixed phy */
-+      dev_info(&pdev->dev, "using fixed PHY\n");
-+      rc = fixed_phy_add(PHY_POLL, pdev->id, &fixed_phy_status);
-+      if (rc && rc != -ENODEV) {
-+              dev_err(&pdev->dev, "unable to register fixed PHY\n");
-+              return rc;

        }
  
        }
  

-+      strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
-+      phy_id = pdev->id;
-+
-+dev_alloc:
+       if (phy_id == PHY_MAX_ADDR) {
+               dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
+               strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
+               phy_id = pdev->id;
++      } else {
++              /* Now disable EPHY and enable MII */
++              dev_info(&pdev->dev, "trying external MII\n");
++              ar7_device_disable(AR7_RESET_BIT_EPHY);
+       }
+ 

        dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
        dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);

+@@ -1168,7 +1167,7 @@
+       priv->dev = dev;
+       priv->ring_size = 64;
+       priv->msg_enable = netif_msg_init(debug_level, 0xff);
+-      memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
++      memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
+ 
+       snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
+ 
+@@ -1244,14 +1243,14 @@
+       ar7_gpio_disable(26);
+       ar7_gpio_disable(27);
+ 
+-      if (!ar7_is_titan()) {
++      if (ar7_is_titan()) {
++              ar7_device_reset(AR7_RESET_BIT_EPHY);
++              ar7_device_reset(TITAN_RESET_BIT_EPHY1);
++      } else {
+               ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+               ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+-      }
+-      ar7_device_reset(AR7_RESET_BIT_EPHY);
+ 
+-      if (ar7_is_titan()) {
+-              ar7_device_reset(TITAN_RESET_BIT_EPHY1);
++              ar7_device_reset(AR7_RESET_BIT_EPHY);
+       }
+ 
+       cpmac_mii->reset(cpmac_mii);
+@@ -1262,14 +1261,7 @@
+               else
+                       msleep(10);
+ 
+-      mask &= 0x7fffffff;
+-      if (mask & (mask - 1)) {
+-              external_switch = 1;
+-              mask = 0;
+-      }
+-
+-      cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
+-              ~(mask | 0x80000000);
++      cpmac_mii->phy_mask = ~mask;
+       snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");

  
  

-       if (!dev) {
+       res = mdiobus_register(cpmac_mii);