#include <typedefs.h>
#include <osl.h>
-#include <bcmutils.h>
#include <sbconfig.h>
#include <sbutils.h>
#include <hndpci.h>
{
ulong flags;
- if (!(sbh = sb_kattach()))
+ if (!(sbh = sb_kattach(SB_OSH)))
panic("sb_kattach failed");
spin_lock_init(&sbh_lock);
spin_unlock_irqrestore(&sbh_lock, flags);
set_io_port_base((unsigned long) ioremap_nocache(SB_PCI_MEM, 0x04000000));
+ mdelay(300); /* workaround for atheros cards */
/* Scan the SB bus */
pci_scan_bus(0, &pcibios_ops, NULL);
writel(0x7FF, (ulong)regs + 0x200);
udelay(1);
}
+ /* PRxxxx: War for 5354 failures. */
+ if (sb_corerev(sbh) == 1) {
+ uint32 tmp;
+
+ /* Change Flush control reg */
+ tmp = readl((uintptr)regs + 0x400);
+ tmp &= ~8;
+ writel(tmp, (uintptr)regs + 0x400);
+ tmp = readl((uintptr)regs + 0x400);
+ printk("USB20H fcr: 0x%x\n", tmp);
+
+ /* Change Shim control reg */
+ tmp = readl((uintptr)regs + 0x304);
+ tmp &= ~0x100;
+ writel(tmp, (uintptr)regs + 0x304);
+ tmp = readl((uintptr)regs + 0x304);
+ printk("USB20H shim cr: 0x%x\n", tmp);
+ }
+
} else
sb_core_reset(sbh, 0, 0);