+ return rtl8366_smi_rmwr(smi, RTL8366S_SGCR,
+ RTL8366S_SGCR_MAX_LENGTH_MASK,
+ length_code);
+}
+
+static int rtl8366s_sw_get_learning_enable(struct switch_dev *dev,
+ const struct switch_attr *attr,
+ struct switch_val *val)
+{
+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
+ u32 data;
+
+ rtl8366_smi_read_reg(smi,RTL8366S_SSCR0, &data);
+ val->value.i = !data;
+
+ return 0;
+}
+
+
+static int rtl8366s_sw_set_learning_enable(struct switch_dev *dev,
+ const struct switch_attr *attr,
+ struct switch_val *val)
+{
+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
+ u32 portmask = 0;
+ int err = 0;
+
+ if (!val->value.i)
+ portmask = RTL8366S_PORT_ALL;
+
+ /* set learning for all ports */
+ REG_WR(smi, RTL8366S_SSCR0, portmask);
+
+ /* set auto ageing for all ports */
+ REG_WR(smi, RTL8366S_SSCR1, portmask);
+
+ return 0;