+ REG(ECR_OFFSET(irq)) = 1 << ((irq - ar7_irq_base) % 32);
+ local_irq_restore(flags);
+}
+
+static void ar7_unmask_secondary_irq(unsigned int irq)
+{
+ unsigned long flags;
+ local_irq_save(flags);
+ /* enable the interrupt channel bit */
+ REG(SEC_ESR_OFFSET) = 1 << (irq - ar7_irq_base - 40);
+ local_irq_restore(flags);
+}
+
+static void ar7_mask_secondary_irq(unsigned int irq)
+{
+ unsigned long flags;
+ local_irq_save(flags);
+ /* disable the interrupt channel bit */
+ REG(SEC_ECR_OFFSET) = 1 << (irq - ar7_irq_base - 40);