kernel: get rid of the simple_prom_emulator, it is not really useful

[openwrt.git] / target / linux / brcm-2.4 / files / arch / mips / bcm947xx / pcibios.c

diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
index 2d85496..c7610f0 100644 (file)
--- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
+++ b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/pcibios.c
@@ -9,7 +9,6 @@
  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  *
  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  *

- * $Id: pcibios.c,v 1.1.1.9 2006/02/27 03:42:55 honor Exp $

  */
 
 #include <linux/config.h>
  */
 
 #include <linux/config.h>


@@ -292,6 +291,7 @@ pcibios_enable_device(struct pci_dev *dev, int mask)
         * after calling pcibios_enable_device().
         */
        if (sb_coreid(sbh) == SB_USB) {
         * after calling pcibios_enable_device().
         */
        if (sb_coreid(sbh) == SB_USB) {

+               printk(KERN_INFO "SB USB 1.1 init\n");

                sb_core_disable(sbh, sb_coreflags(sbh, 0, 0));
                sb_core_reset(sbh, 1 << 29, 0);
        }
                sb_core_disable(sbh, sb_coreflags(sbh, 0, 0));
                sb_core_reset(sbh, 1 << 29, 0);
        }


@@ -306,13 +306,22 @@ pcibios_enable_device(struct pci_dev *dev, int mask)
         *    phy components out of reset.
         */
        else if (sb_coreid(sbh) == SB_USB20H) {
         *    phy components out of reset.
         */
        else if (sb_coreid(sbh) == SB_USB20H) {

+               
+               uint corerev = sb_corerev(sbh);
+
+               printk(KERN_INFO "SB USB20H init\n");
+               printk(KERN_INFO "SB COREREV: %d\n", corerev);
+               

                if (!sb_iscoreup(sbh)) {
                if (!sb_iscoreup(sbh)) {

+                                               
+                       printk(KERN_INFO "SB USB20H resetting\n");
+

                        sb_core_reset(sbh, 0, 0);
                        writel(0x7FF, (ulong)regs + 0x200);
                        udelay(1);
                }
                /* PRxxxx: War for 5354 failures. */
                        sb_core_reset(sbh, 0, 0);
                        writel(0x7FF, (ulong)regs + 0x200);
                        udelay(1);
                }
                /* PRxxxx: War for 5354 failures. */

-               if (sb_corerev(sbh) == 1) {
+               if (corerev == 1 || corerev == 2) {

                        uint32 tmp;
 
                        /* Change Flush control reg */
                        uint32 tmp;
 
                        /* Change Flush control reg */


@@ -320,14 +329,14 @@ pcibios_enable_device(struct pci_dev *dev, int mask)
                        tmp &= ~8;
                        writel(tmp, (uintptr)regs + 0x400);
                        tmp = readl((uintptr)regs + 0x400);
                        tmp &= ~8;
                        writel(tmp, (uintptr)regs + 0x400);
                        tmp = readl((uintptr)regs + 0x400);

-                       printk("USB20H fcr: 0x%x\n", tmp);
+                       printk(KERN_INFO "USB20H fcr: 0x%x\n", tmp);

 
                        /* Change Shim control reg */
                        tmp = readl((uintptr)regs + 0x304);
                        tmp &= ~0x100;
                        writel(tmp, (uintptr)regs + 0x304);
                        tmp = readl((uintptr)regs + 0x304);
 
                        /* Change Shim control reg */
                        tmp = readl((uintptr)regs + 0x304);
                        tmp &= ~0x100;
                        writel(tmp, (uintptr)regs + 0x304);
                        tmp = readl((uintptr)regs + 0x304);

-                       printk("USB20H shim cr: 0x%x\n", tmp);
+                       printk(KERN_INFO "USB20H shim cr: 0x%x\n", tmp);

                }
 
        } else
                }
 
        } else