mutex_lock(&bus->mdio_lock);
bus->write(bus, 0x18, 0, page);
- msleep(1); /* wait for the page switch to propagate */
+ usleep_range(1000, 2000); /* wait for the page switch to propagate */
lo = bus->read(bus, 0x10 | r2, r1);
hi = bus->read(bus, 0x10 | r2, r1 + 1);
mutex_lock(&bus->mdio_lock);
bus->write(bus, 0x18, 0, r3);
- msleep(1); /* wait for the page switch to propagate */
+ usleep_range(1000, 2000); /* wait for the page switch to propagate */
bus->write(bus, 0x10 | r2, r1 + 1, hi);
bus->write(bus, 0x10 | r2, r1, lo);
int egress, ingress;
int pvid;
- if (priv->vlan)
- pvid = priv->vlan_id[priv->pvid[i]];
- else
- pvid = i;
-
if (priv->vlan) {
+ pvid = priv->vlan_id[priv->pvid[i]];
if (priv->vlan_tagged & (1 << i))
egress = AR8216_OUT_ADD_VLAN;
else
egress = AR8216_OUT_STRIP_VLAN;
+ ingress = AR8216_IN_SECURE;
} else {
+ pvid = i;
egress = AR8216_OUT_KEEP;
- }
-
- if (priv->vlan)
- ingress = AR8216_IN_SECURE;
- else
ingress = AR8216_IN_PORT_ONLY;
+ }
if (priv->chip == AR8236)
ar8236_setup_port(priv, i, egress, ingress, portmask[i],
static int
ar8216_hw_init(struct ar8216_priv *priv)
{
- /* XXX: undocumented magic from atheros, required! */
- priv->write(priv, 0x38, 0xc000050e);
-
- ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
- AR8216_GCTRL_MTU, 1518 + 8 + 2);
return 0;
}
}
msleep(1000);
- /* enable jumbo frames */
- ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
- AR8316_GCTRL_MTU, 9018 + 8 + 2);
-
priv->initialized = true;
return 0;
}
priv->write(priv, 0x8, newval);
- /* standard atheros magic */
- priv->write(priv, 0x38, 0xc000050e);
-
/* Initialize the ports */
bus = priv->phy->bus;
for (i = 0; i < 5; i++) {
msleep(1000);
}
- /* enable jumbo frames */
- ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
- AR8316_GCTRL_MTU, 9018 + 8 + 2);
-
- /* enable cpu port to receive multicast and broadcast frames */
- priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
-
out:
priv->initialized = true;
return 0;
}
+static void
+ar8216_init_globals(struct ar8216_priv *priv)
+{
+ switch (priv->chip) {
+ case AR8216:
+ /* standard atheros magic */
+ priv->write(priv, 0x38, 0xc000050e);
+
+ ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+ AR8216_GCTRL_MTU, 1518 + 8 + 2);
+ break;
+ case AR8316:
+ /* standard atheros magic */
+ priv->write(priv, 0x38, 0xc000050e);
+
+ /* enable cpu port to receive multicast and broadcast frames */
+ priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
+
+ /* fall through */
+ case AR8236:
+ /* enable jumbo frames */
+ ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+ AR8316_GCTRL_MTU, 9018 + 8 + 2);
+ break;
+ }
+}
+
static void
ar8216_init_port(struct ar8216_priv *priv, int port)
{
for (i = 0; i < AR8216_NUM_PORTS; i++)
ar8216_init_port(priv, i);
+ ar8216_init_globals(priv);
mutex_unlock(&priv->reg_mutex);
+
return ar8216_hw_apply(dev);
}