kernel: fix cryptodev with kernel >= 2.6.35

[openwrt.git] / target / linux / ppc40x / patches / 005-openrb.patch

diff --git a/target/linux/ppc40x/patches/005-openrb.patch b/target/linux/ppc40x/patches/005-openrb.patch
index a90fba8..638c81d 100644 (file)
--- a/target/linux/ppc40x/patches/005-openrb.patch
+++ b/target/linux/ppc40x/patches/005-openrb.patch
@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/arch/powerpc/boot/cuboot-openrb.c
-@@ -0,0 +1,71 @@
+@@ -0,0 +1,94 @@
 +/*
 + * Old U-boot compatibility for OpenRB boards
 + *
@@ -26,39 +26,62 @@
 +
 +static bd_t bd;
 +
-+static void fixup_cf_card(void)
++static void fixup_perwe(void)
 +{
 +#define DCRN_CPC0_PCI_BASE    0xf9
-+#define CF_CS0_BASE           0xff100000
-+#define CF_CS1_BASE           0xff200000
 +
-+      /* Turn on PerWE instead of PCIsomething */
++      /* Turn on PerWE instead of PCIINT */
 +      mtdcr(DCRN_CPC0_PCI_BASE,
 +            mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
 +
++#undef DCRN_CPC0_PCI_BASE
++}
++
++static void fixup_cf_card(void)
++{
++#define CF_CS0_BASE           0xff100000
++#define CF_CS1_BASE           0xff200000
++
 +      /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
 +      mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
-+      mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
++      mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
++                               EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
 +      mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
 +      mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
 +
 +      /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
 +      mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
-+      mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
++      mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
++                               EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
 +      mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
 +      mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
 +
-+#undef DCRN_CPC0_PCI_BASE
 +#undef CF_CS0_BASE
 +#undef CF_CS1_BASE
 +}
 +
++static void fixup_isp116x(void)
++{
++#define ISP116X_CS_BASE               0xf0000000
++
++      /* PerCS3 (ISP1160's CS): base 0xf0000000, size 32MB, 16-bit, rw */
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B3CR);
++      mtdcr(DCRN_EBC0_CFGDATA, ISP116X_CS_BASE | EBC_BXCR_BS_32M |
++                               EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
++      mtdcr(DCRN_EBC0_CFGADDR, EBC_B3AP);
++      mtdcr(DCRN_EBC0_CFGDATA, 0x03016600);
++
++#undef ISP116X_CS_BASE
++}
++
 +static void openrb_fixups(void)
 +{
 +      ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
 +      ibm4xx_sdram_fixup_memsize();
 +
++      fixup_perwe();
 +      fixup_cf_card();
++      fixup_isp116x();
 +
 +      dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
 +}
@@ -74,7 +97,7 @@
 +}
 --- /dev/null
 +++ b/arch/powerpc/boot/dts/openrb.dts
-@@ -0,0 +1,280 @@
+@@ -0,0 +1,291 @@
 +/*
 + * Device Tree Source for OpenRB boards
 + *
@@ -278,6 +301,17 @@
 +                       */
 +                      clock-frequency = <0>; /* Filled in by zImage */
 +
++                      isp116x@f0000000 {
++                              compatible = "isp116x-hcd";
++                              oc_enable;
++                              int_act_high;
++                              int_edge_triggered;
++                              reg = <0x00000000 0xf0000000 0x00000002 /* data */
++                                     0x00000000 0xf1000000 0x00000002 /* addr */ >;
++                              interrupt-parent = <&UIC0>;
++                              interrupts = <0x1b 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
++                      };
++
 +                      cf_card@ff100000 {
 +                              compatible = "magicbox-cf", "pata-magicbox-cf";
 +                              reg = <0x00000000 0xff100000 0x00001000