(3/6) bcm57xx: preinit

[openwrt.git] / target / linux / brcm-2.4 / patches / 013-wl_hdd_pdc202xx.patch

diff --git a/target/linux/brcm-2.4/patches/013-wl_hdd_pdc202xx.patch b/target/linux/brcm-2.4/patches/013-wl_hdd_pdc202xx.patch
index 63e0cd6..48b3b3b 100644 (file)
--- a/target/linux/brcm-2.4/patches/013-wl_hdd_pdc202xx.patch
+++ b/target/linux/brcm-2.4/patches/013-wl_hdd_pdc202xx.patch
@@ -1,6 +1,8 @@
---- linux.old/drivers/ide/pci/pdc202xx_old.c   2006-12-23 21:34:20.000000000 +0100
-+++ linux.dev/drivers/ide/pci/pdc202xx_old.c   2007-01-24 18:03:28.000000000 +0100
-@@ -253,23 +253,23 @@
+Index: linux-2.4.35.4/drivers/ide/pci/pdc202xx_old.c
+===================================================================
+--- linux-2.4.35.4.orig/drivers/ide/pci/pdc202xx_old.c
++++ linux-2.4.35.4/drivers/ide/pci/pdc202xx_old.c
+@@ -253,23 +253,23 @@ static int pdc202xx_tune_chipset (ide_dr

        pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
  
        if (speed < XFER_SW_DMA_0) {
        pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
  
        if (speed < XFER_SW_DMA_0) {


@@ -28,7 +30,7 @@
                        pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
  
                        /* clear DMA modes of lower 8421 bits of C Register */
                        pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
  
                        /* clear DMA modes of lower 8421 bits of C Register */

-@@ -373,6 +373,9 @@
+@@ -373,6 +373,9 @@ static int config_chipset_for_dma (ide_d

        u8 ultra_66             = ((id->dma_ultra & 0x0010) ||
                                   (id->dma_ultra & 0x0008)) ? 1 : 0;
  
        u8 ultra_66             = ((id->dma_ultra & 0x0010) ||
                                   (id->dma_ultra & 0x0008)) ? 1 : 0;
  


@@ -38,4 +40,3 @@
        switch(dev->device) {
                case PCI_DEVICE_ID_PROMISE_20267:
                case PCI_DEVICE_ID_PROMISE_20265:
        switch(dev->device) {
                case PCI_DEVICE_ID_PROMISE_20267:
                case PCI_DEVICE_ID_PROMISE_20265:

-