PXA can use EABI, too

[openwrt.git] / target / linux / ar7 / patches-2.6.24 / 100-board_support.patch

diff --git a/target/linux/ar7/patches-2.6.24/100-board_support.patch b/target/linux/ar7/patches-2.6.24/100-board_support.patch
index d23aecf..b9ee687 100644 (file)
--- a/target/linux/ar7/patches-2.6.24/100-board_support.patch
+++ b/target/linux/ar7/patches-2.6.24/100-board_support.patch
@@ -2,7 +2,7 @@ Index: linux-2.6.23-rc6/arch/mips/Kconfig
 ===================================================================
 --- linux-2.6.23-rc6.orig/arch/mips/Kconfig    2007-09-21 16:23:51.000000000 +0800
 +++ linux-2.6.23-rc6/arch/mips/Kconfig 2007-09-21 16:24:11.000000000 +0800
 ===================================================================
 --- linux-2.6.23-rc6.orig/arch/mips/Kconfig    2007-09-21 16:23:51.000000000 +0800
 +++ linux-2.6.23-rc6/arch/mips/Kconfig 2007-09-21 16:24:11.000000000 +0800

-@@ -15,6 +15,22 @@
+@@ -15,6 +15,24 @@

        prompt "System type"
        default SGI_IP22
  
        prompt "System type"
        default SGI_IP22
  


@@ -10,6 +10,8 @@ Index: linux-2.6.23-rc6/arch/mips/Kconfig
 +      bool "Texas Instruments AR7"
 +      select BOOT_ELF32
 +      select DMA_NONCOHERENT
 +      bool "Texas Instruments AR7"
 +      select BOOT_ELF32
 +      select DMA_NONCOHERENT

++      select CEVT_R4K
++      select CSRC_R4K

 +      select IRQ_CPU
 +      select NO_EXCEPT_FILL
 +      select SWAP_IO_SPACE
 +      select IRQ_CPU
 +      select NO_EXCEPT_FILL
 +      select SWAP_IO_SPACE


@@ -48,7 +50,7 @@ Index: linux-2.6.23-rc6/arch/mips/kernel/traps.c
 +                      *(u32 *)(ebase + 0x20C) = 0x00000000;
 +                      flush_icache_range(ebase + 0x200, ebase + 0x210);
 +              } else {
 +                      *(u32 *)(ebase + 0x20C) = 0x00000000;
 +                      flush_icache_range(ebase + 0x200, ebase + 0x210);
 +              } else {

-+                      *(volatile u32 *)(ebase + 0x200) =
++                      *(u32 *)(ebase + 0x200) =

 +                              0x08000000 | (0x03ffffff & (handler >> 2));
 +                      flush_icache_range(ebase + 0x200, ebase + 0x204);
 +              }
 +                              0x08000000 | (0x03ffffff & (handler >> 2));
 +                      flush_icache_range(ebase + 0x200, ebase + 0x204);
 +              }