ar71xx: merge files-3.2 to files
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dir-825-b1.c
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c
new file mode 100644 (file)
index 0000000..ab973eb
--- /dev/null
@@ -0,0 +1,208 @@
+/*
+ *  D-Link DIR-825 rev. B1 board support
+ *
+ *  Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
+ *
+ *  based on mach-wndr3700.c
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/rtl8366.h>
+
+#include <asm/mach-ath79/ath79.h>
+
+#include "dev-eth.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "machtypes.h"
+
+#define DIR825B1_GPIO_LED_BLUE_USB             0
+#define DIR825B1_GPIO_LED_ORANGE_POWER         1
+#define DIR825B1_GPIO_LED_BLUE_POWER           2
+#define DIR825B1_GPIO_LED_BLUE_WPS             4
+#define DIR825B1_GPIO_LED_ORANGE_PLANET                6
+#define DIR825B1_GPIO_LED_BLUE_PLANET          11
+
+#define DIR825B1_GPIO_BTN_RESET                        3
+#define DIR825B1_GPIO_BTN_WPS                  8
+
+#define DIR825B1_GPIO_RTL8366_SDA              5
+#define DIR825B1_GPIO_RTL8366_SCK              7
+
+#define DIR825B1_KEYS_POLL_INTERVAL            20      /* msecs */
+#define DIR825B1_KEYS_DEBOUNCE_INTERVAL                (3 * DIR825B1_KEYS_POLL_INTERVAL)
+
+#define DIR825B1_CAL_LOCATION_0                        0x1f661000
+#define DIR825B1_CAL_LOCATION_1                        0x1f665000
+
+#define DIR825B1_MAC_LOCATION_0                        0x1f66ffa0
+#define DIR825B1_MAC_LOCATION_1                        0x1f66ffb4
+
+static struct mtd_partition dir825b1_partitions[] = {
+       {
+               .name           = "uboot",
+               .offset         = 0,
+               .size           = 0x040000,
+               .mask_flags     = MTD_WRITEABLE,
+       }, {
+               .name           = "config",
+               .offset         = 0x040000,
+               .size           = 0x010000,
+               .mask_flags     = MTD_WRITEABLE,
+       }, {
+               .name           = "firmware",
+               .offset         = 0x050000,
+               .size           = 0x610000,
+       }, {
+               .name           = "caldata",
+               .offset         = 0x660000,
+               .size           = 0x010000,
+               .mask_flags     = MTD_WRITEABLE,
+       }, {
+               .name           = "unknown",
+               .offset         = 0x670000,
+               .size           = 0x190000,
+               .mask_flags     = MTD_WRITEABLE,
+       }
+};
+
+static struct flash_platform_data dir825b1_flash_data = {
+       .parts          = dir825b1_partitions,
+       .nr_parts       = ARRAY_SIZE(dir825b1_partitions),
+};
+
+static struct gpio_led dir825b1_leds_gpio[] __initdata = {
+       {
+               .name           = "d-link:blue:usb",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_USB,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:orange:power",
+               .gpio           = DIR825B1_GPIO_LED_ORANGE_POWER,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:blue:power",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_POWER,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:blue:wps",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_WPS,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:orange:planet",
+               .gpio           = DIR825B1_GPIO_LED_ORANGE_PLANET,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:blue:planet",
+               .gpio           = DIR825B1_GPIO_LED_BLUE_PLANET,
+               .active_low     = 1,
+       }
+};
+
+static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
+       {
+               .desc           = "reset",
+               .type           = EV_KEY,
+               .code           = KEY_RESTART,
+               .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DIR825B1_GPIO_BTN_RESET,
+               .active_low     = 1,
+       }, {
+               .desc           = "wps",
+               .type           = EV_KEY,
+               .code           = KEY_WPS_BUTTON,
+               .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DIR825B1_GPIO_BTN_WPS,
+               .active_low     = 1,
+       }
+};
+
+static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
+       { .reg = 0x06, .val = 0x0108 },
+};
+
+static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
+       .gpio_sda       = DIR825B1_GPIO_RTL8366_SDA,
+       .gpio_sck       = DIR825B1_GPIO_RTL8366_SCK,
+       .num_initvals   = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
+       .initvals       = dir825b1_rtl8366s_initvals,
+};
+
+static struct platform_device dir825b1_rtl8366s_device = {
+       .name           = RTL8366S_DRIVER_NAME,
+       .id             = -1,
+       .dev = {
+               .platform_data  = &dir825b1_rtl8366s_data,
+       }
+};
+
+static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr)
+{
+       int ret;
+       u8 *src = (u8 *)KSEG1ADDR(src_addr);
+
+       ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+                    &dest[0], &dest[1], &dest[2],
+                    &dest[3], &dest[4], &dest[5]);
+
+       if (ret != ETH_ALEN)
+               memset(dest, 0, ETH_ALEN);
+}
+
+static void __init dir825b1_setup(void)
+{
+       u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
+
+       dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0);
+       dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1);
+
+       ath79_register_mdio(0, 0x0);
+
+       ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
+       ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
+       ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ath79_eth0_data.speed = SPEED_1000;
+       ath79_eth0_data.duplex = DUPLEX_FULL;
+       ath79_eth0_pll_data.pll_1000 = 0x11110000;
+
+       ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
+       ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ath79_eth1_data.phy_mask = 0x10;
+       ath79_eth1_pll_data.pll_1000 = 0x11110000;
+
+       ath79_register_eth(0);
+       ath79_register_eth(1);
+
+       ath79_register_m25p80(&dir825b1_flash_data);
+
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
+                                dir825b1_leds_gpio);
+
+       ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(dir825b1_gpio_keys),
+                                       dir825b1_gpio_keys);
+
+       ath79_register_usb();
+
+       platform_device_register(&dir825b1_rtl8366s_device);
+
+       ap9x_pci_setup_wmac_led_pin(0, 5);
+       ap9x_pci_setup_wmac_led_pin(1, 5);
+
+       ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1,
+                     (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2);
+}
+
+MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
+            dir825b1_setup);
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