[rb532] update 2.6.27 patches with upstream fixes from git repository and mailing...
[openwrt.git] / target / linux / rb532 / patches-2.6.27 / 023-rb532_fix_init_of_rb532_dev3_ctl_res.patch
diff --git a/target/linux/rb532/patches-2.6.27/023-rb532_fix_init_of_rb532_dev3_ctl_res.patch b/target/linux/rb532/patches-2.6.27/023-rb532_fix_init_of_rb532_dev3_ctl_res.patch
new file mode 100644 (file)
index 0000000..64a6d89
--- /dev/null
@@ -0,0 +1,32 @@
+This register just contains the address of the actual resource, so
+initialisation has to be the same as cf_slot0_res and nand_slot0_res.
+
+Signed-off-by: Phil Sutter <n0-1@freewrt.org>
+---
+diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
+index d75eb19..40deb11 100644
+--- a/arch/mips/rb532/gpio.c
++++ b/arch/mips/rb532/gpio.c
+@@ -55,8 +55,6 @@ static struct resource rb532_gpio_reg0_res[] = {
+ static struct resource rb532_dev3_ctl_res[] = {
+       {
+               .name   = "dev3_ctl",
+-              .start  = REGBASE + DEV3BASE,
+-              .end    = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
+               .flags  = IORESOURCE_MEM,
+       }
+ };
+@@ -243,6 +241,9 @@ int __init rb532_gpio_init(void)
+       /* Register our GPIO chip */
+       gpiochip_add(&rb532_gpio_chip->chip);
++      rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
++      rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
++
+       r = rb532_dev3_ctl_res;
+       dev3.base = ioremap_nocache(r->start, r->end - r->start);
+-- 
+1.5.6.4
+
+
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