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Fix ramips build when CONFIG_RALINK_DEV_GPIO_BUTTONS is not set.
[openwrt.git]
/
target
/
linux
/
ramips
/
files
/
arch
/
mips
/
include
/
asm
/
mach-ralink
/
rt288x.h
diff --git
a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
index
9b218de
..
a804488
100644
(file)
--- a/
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
@@
-1,7
+1,7
@@
/*
* Ralink RT288x SoC specific definitions
*
/*
* Ralink RT288x SoC specific definitions
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008
-2009
Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Ralink's 2.6.21 BSP
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Ralink's 2.6.21 BSP
@@
-18,18
+18,11
@@
#include <linux/io.h>
void rt288x_detect_sys_type(void) __init;
#include <linux/io.h>
void rt288x_detect_sys_type(void) __init;
-
-#define RT288X_SYS_TYPE_LEN 64
-extern unsigned char rt288x_sys_type[RT288X_SYS_TYPE_LEN];
-
void rt288x_detect_sys_freq(void) __init;
extern unsigned long rt288x_cpu_freq;
extern unsigned long rt288x_sys_freq;
void rt288x_detect_sys_freq(void) __init;
extern unsigned long rt288x_cpu_freq;
extern unsigned long rt288x_sys_freq;
-extern unsigned long rt288x_mach_type;
-#define RT288X_MACH_GENERIC 0
-
#define RT288X_CPU_IRQ_BASE 0
#define RT288X_INTC_IRQ_BASE 8
#define RT288X_INTC_IRQ_COUNT 32
#define RT288X_CPU_IRQ_BASE 0
#define RT288X_INTC_IRQ_BASE 8
#define RT288X_INTC_IRQ_COUNT 32
@@
-53,7
+46,6
@@
extern unsigned long rt288x_mach_type;
#define RT288X_GPIO_COUNT 32
extern void __iomem *rt288x_sysc_base;
#define RT288X_GPIO_COUNT 32
extern void __iomem *rt288x_sysc_base;
-extern void __iomem *rt288x_intc_base;
extern void __iomem *rt288x_memc_base;
static inline void rt288x_sysc_wr(u32 val, unsigned reg)
extern void __iomem *rt288x_memc_base;
static inline void rt288x_sysc_wr(u32 val, unsigned reg)
@@
-66,16
+58,6
@@
static inline u32 rt288x_sysc_rr(unsigned reg)
return __raw_readl(rt288x_sysc_base + reg);
}
return __raw_readl(rt288x_sysc_base + reg);
}
-static inline void rt288x_intc_wr(u32 val, unsigned reg)
-{
- __raw_writel(val, rt288x_intc_base + reg);
-}
-
-static inline u32 rt288x_intc_rr(unsigned reg)
-{
- return __raw_readl(rt288x_intc_base + reg);
-}
-
static inline void rt288x_memc_wr(u32 val, unsigned reg)
{
__raw_writel(val, rt288x_memc_base + reg);
static inline void rt288x_memc_wr(u32 val, unsigned reg)
{
__raw_writel(val, rt288x_memc_base + reg);
@@
-86,4
+68,6
@@
static inline u32 rt288x_memc_rr(unsigned reg)
return __raw_readl(rt288x_memc_base + reg);
}
return __raw_readl(rt288x_memc_base + reg);
}
+void rt288x_gpio_init(u32 mode) __init;
+
#endif /* _RT228X_H_ */
#endif /* _RT228X_H_ */
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