ramips: add support for Belkin F5D8235 v2 board

[openwrt.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt288x_regs.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
index 4431a65..1dd6c2d 100644 (file)
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
@@ -1,7 +1,7 @@
 /*
  *  Ralink RT288x SoC register definitions
  *
- *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  This program is free software; you can redistribute it and/or modify it
@@ -23,10 +23,11 @@
 #define RT2880_I2C_BASE                0x00300900
 #define RT2880_SPI_BASE                0x00300b00
 #define RT2880_UART1_BASE      0x00300c00
-#define RT2880_FE_BASE         0x00310000
-#define RT2880_ROM_BASE                0x00400000
-#define RT2880_PCI_BASE                0x00500000
-#define RT2880_WMAC_BASE       0x00600000
+#define RT2880_FE_BASE         0x00400000
+#define RT2880_ROM_BASE                0x00410000
+#define RT2880_PCM_BASE                0x00420000
+#define RT2880_PCI_BASE                0x00440000
+#define RT2880_WMAC_BASE       0x00480000
 #define RT2880_FLASH1_BASE     0x01000000
 #define RT2880_FLASH0_BASE     0x1fc00000
 #define RT2880_SDRAM_BASE      0x08000000
@@ -46,6 +47,7 @@
 #define SYSC_REG_SYSTEM_CONFIG 0x010   /* System Configuration */
 #define SYSC_REG_RESET_CTRL    0x034   /* Reset Control*/
 #define SYSC_REG_RESET_STATUS  0x038   /* Reset Status*/
+#define SYSC_REG_GPIO_MODE     0x060   /* GPIO Purpose Select */
 #define SYSC_REG_IA_ADDRESS    0x310   /* Illegal Access Address */
 #define SYSC_REG_IA_TYPE       0x314   /* Illegal Access Type */
 
@@ -75,15 +77,14 @@
 #define RT2880_RESET_FE                BIT(18)
 #define RT2880_RESET_PCM       BIT(19)
 
-/* TIMER registers */
-
-/* INTC register */
-#define INTC_REG_STATUS0       0x00
-#define INTC_REG_STATUS1       0x04
-#define INTC_REG_TYPE          0x20
-#define INTC_REG_RAW_STATUS    0x30
-#define INTC_REG_ENABLE                0x34
-#define INTC_REG_DISABLE       0x38
+#define RT2880_GPIO_MODE_I2C   BIT(0)
+#define RT2880_GPIO_MODE_UART0 BIT(1)
+#define RT2880_GPIO_MODE_SPI   BIT(2)
+#define RT2880_GPIO_MODE_UART1 BIT(3)
+#define RT2880_GPIO_MODE_JTAG  BIT(4)
+#define RT2880_GPIO_MODE_MDIO  BIT(5)
+#define RT2880_GPIO_MODE_SDRAM BIT(6)
+#define RT2880_GPIO_MODE_PCI   BIT(7)
 
 #define RT2880_INTC_INT_TIMER0 BIT(0)
 #define RT2880_INTC_INT_TIMER1 BIT(1)