ar71xx: add defines for the AR934X GMAC interface

[openwrt.git] / target / linux / brcm47xx / patches-3.0 / 0014-ssb-move-flash-to-chipcommon.patch

diff --git a/target/linux/brcm47xx/patches-3.0/0014-ssb-move-flash-to-chipcommon.patch b/target/linux/brcm47xx/patches-3.0/0014-ssb-move-flash-to-chipcommon.patch
index 0d47888..91d8acb 100644 (file)
--- a/target/linux/brcm47xx/patches-3.0/0014-ssb-move-flash-to-chipcommon.patch
+++ b/target/linux/brcm47xx/patches-3.0/0014-ssb-move-flash-to-chipcommon.patch
@@ -1,4 +1,4 @@
-From be495ba9c365a31cf6a9fa0f67df9a9a9e0f1a1f Mon Sep 17 00:00:00 2001
+From e8afde87ecf56beff67c7d5371cabaa4fc018541 Mon Sep 17 00:00:00 2001

 From: Hauke Mehrtens <hauke@hauke-m.de>
 Date: Sat, 23 Jul 2011 23:57:06 +0200
 Subject: [PATCH 14/26] ssb: move flash to chipcommon
 From: Hauke Mehrtens <hauke@hauke-m.de>
 Date: Sat, 23 Jul 2011 23:57:06 +0200
 Subject: [PATCH 14/26] ssb: move flash to chipcommon


@@ -8,10 +8,10 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 ---
  arch/mips/bcm47xx/nvram.c                 |    8 +++---
  arch/mips/bcm47xx/wgt634u.c               |    8 +++---
 ---
  arch/mips/bcm47xx/nvram.c                 |    8 +++---
  arch/mips/bcm47xx/wgt634u.c               |    8 +++---

- drivers/ssb/driver_mipscore.c             |   31 +++++++++++++++++++---------
- include/linux/ssb/ssb_driver_chipcommon.h |   18 ++++++++++++++++
+ drivers/ssb/driver_mipscore.c             |   36 +++++++++++++++++++++-------
+ include/linux/ssb/ssb_driver_chipcommon.h |   18 ++++++++++++++

  include/linux/ssb/ssb_driver_mips.h       |    4 ---
  include/linux/ssb/ssb_driver_mips.h       |    4 ---

- 5 files changed, 47 insertions(+), 22 deletions(-)
+ 5 files changed, 53 insertions(+), 21 deletions(-)

 
 --- a/arch/mips/bcm47xx/nvram.c
 +++ b/arch/mips/bcm47xx/nvram.c
 
 --- a/arch/mips/bcm47xx/nvram.c
 +++ b/arch/mips/bcm47xx/nvram.c


@@ -56,7 +56,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
                                            ARRAY_SIZE(wgt634u_devices));
 --- a/drivers/ssb/driver_mipscore.c
 +++ b/drivers/ssb/driver_mipscore.c
                                            ARRAY_SIZE(wgt634u_devices));
 --- a/drivers/ssb/driver_mipscore.c
 +++ b/drivers/ssb/driver_mipscore.c

-@@ -190,16 +190,27 @@ static void ssb_mips_flash_detect(struct
+@@ -190,16 +190,34 @@ static void ssb_mips_flash_detect(struct

  {
        struct ssb_bus *bus = mcore->dev->bus;
  
  {
        struct ssb_bus *bus = mcore->dev->bus;
  


@@ -64,12 +64,16 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 -      if (bus->chipco.dev) {
 -              mcore->flash_window = 0x1c000000;
 -              mcore->flash_window_size = 0x02000000;
 -      if (bus->chipco.dev) {
 -              mcore->flash_window = 0x1c000000;
 -              mcore->flash_window_size = 0x02000000;

--              if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
--                             & SSB_CHIPCO_CFG_DS16) == 0)
--                      mcore->flash_buswidth = 1;
--      } else {
--              mcore->flash_window = 0x1fc00000;
--              mcore->flash_window_size = 0x00400000;
++      /* When there is no chipcommon on the bus there is 4MB flash */
++      if (!bus->chipco.dev) {
++              pr_info("found parallel flash.\n");
++              bus->chipco.flash_type = SSB_PFLASH;
++              bus->chipco.pflash.window = SSB_FLASH1;
++              bus->chipco.pflash.window_size = SSB_FLASH1_SZ;
++              bus->chipco.pflash.buswidth = 2;
++              return;
++      }
++

 +      switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
 +      case SSB_CHIPCO_FLASHT_STSER:
 +      case SSB_CHIPCO_FLASHT_ATSER:
 +      switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
 +      case SSB_CHIPCO_FLASHT_STSER:
 +      case SSB_CHIPCO_FLASHT_ATSER:


@@ -78,17 +82,19 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 +      case SSB_CHIPCO_FLASHT_PARA:
 +              pr_info("found parallel flash.\n");
 +              bus->chipco.flash_type = SSB_PFLASH;
 +      case SSB_CHIPCO_FLASHT_PARA:
 +              pr_info("found parallel flash.\n");
 +              bus->chipco.flash_type = SSB_PFLASH;

-+              bus->chipco.pflash.buswidth = 2;
-+              if (bus->chipco.dev) {
-+                      bus->chipco.pflash.window = 0x1c000000;
-+                      bus->chipco.pflash.window_size = 0x02000000;
-+                      if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
-+                           & SSB_CHIPCO_CFG_DS16) == 0)
-+                              bus->chipco.pflash.buswidth = 1;
-+              } else {
-+                      bus->chipco.pflash.window = 0x1fc00000;
-+                      bus->chipco.pflash.window_size = 0x00400000;
-+              }
++              bus->chipco.pflash.window = SSB_FLASH2;
++              bus->chipco.pflash.window_size = SSB_FLASH2_SZ;
+               if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
+-                             & SSB_CHIPCO_CFG_DS16) == 0)
+-                      mcore->flash_buswidth = 1;
+-      } else {
+-              mcore->flash_window = 0x1fc00000;
+-              mcore->flash_window_size = 0x00400000;
++                   & SSB_CHIPCO_CFG_DS16) == 0)
++                      bus->chipco.pflash.buswidth = 1;
++              else
++                      bus->chipco.pflash.buswidth = 2;
++              break;

 +      default:
 +              pr_err("flash not supported.\n");
        }
 +      default:
 +              pr_err("flash not supported.\n");
        }