}
/*
-@@ -1027,6 +1043,7 @@ static void s3cmci_send_request(struct m
+@@ -1026,6 +1042,7 @@ static void s3cmci_send_request(struct m
dbg(host, dbg_err, "data prepare error %d\n", res);
cmd->error = res;
cmd->data->error = res;
mmc_request_done(mmc, mrq);
return;
-@@ -1264,10 +1281,8 @@ static int __devinit s3cmci_probe(struct
+@@ -1263,10 +1280,8 @@ static int __devinit s3cmci_probe(struct
host->is2440 = is2440;
host->pdata = pdev->dev.platform_data;
spin_lock_init(&host->complete_lock);
tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
-@@ -1380,6 +1395,18 @@ static int __devinit s3cmci_probe(struct
+@@ -1379,6 +1394,18 @@ static int __devinit s3cmci_probe(struct
mmc->f_min = host->clk_rate / (host->clk_div * 256);
mmc->f_max = host->clk_rate / host->clk_div;
if (host->pdata->ocr_avail)
mmc->ocr_avail = host->pdata->ocr_avail;
-@@ -1492,18 +1519,60 @@ static int __devinit s3cmci_2440_probe(s
+@@ -1491,18 +1518,60 @@ static int __devinit s3cmci_2440_probe(s
#ifdef CONFIG_PM
}
#else /* CONFIG_PM */
-@@ -1561,9 +1630,13 @@ static void __exit s3cmci_exit(void)
+@@ -1560,9 +1629,13 @@ static void __exit s3cmci_exit(void)
module_init(s3cmci_init);
module_exit(s3cmci_exit);
spin_unlock_irqrestore(&host->lock, flags);
mmc_detect_change(host->mmc, msecs_to_jiffies(200));
-@@ -1283,11 +1318,24 @@ static void sdhci_cmd_irq(struct sdhci_h
- * controllers.
- */
- if (host->cmd->flags & MMC_RSP_BUSY) {
-+ u32 present;
-+
- if (host->cmd->data)
- DBG("Cannot wait for busy signal when also "
- "doing a data transfer");
-- else
-+ else if (!(host->quirks & SDHCI_QUIRK_NO_TCIRQ_ON_NOT_BUSY))
- return;
-+
-+ /* The Samsung SDHCI does not seem to provide an INT_DATA_END
-+ * when the system goes non-busy, so check the state of the
-+ * transfer by reading SDHCI_PRESENT_STATE to see if the
-+ * controller is ready
-+ */
-+
-+ present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
-+ DBG("busy? present %08x, intstat %08x\n", present, intmask);
-+
-+ /* fall through and take the SDHCI_INT_RESPONSE */
- }
-
- if (intmask & SDHCI_INT_RESPONSE)
-@@ -1604,17 +1652,23 @@ int sdhci_add_host(struct sdhci_host *ho
+@@ -1607,17 +1642,23 @@ int sdhci_add_host(struct sdhci_host *ho
mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
}
#define SDHCI_HOST_CONTROL 0x28
#define SDHCI_CTRL_LED 0x01
-@@ -210,6 +211,8 @@ struct sdhci_host {
- #define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
- /* Controller supports high speed but doesn't have the caps bit set */
- #define SDHCI_QUIRK_FORCE_HIGHSPEED (1<<14)
-+/* Controller does not provide transfer-complete interrupt when not busy */
-+#define SDHCI_QUIRK_NO_TCIRQ_ON_NOT_BUSY (1<<15)
-
- int irq; /* Device IRQ */
- void __iomem * ioaddr; /* Mapped address */
-@@ -267,6 +270,14 @@ struct sdhci_host {
+@@ -270,6 +271,14 @@ struct sdhci_host {
struct sdhci_ops {
int (*enable_dma)(struct sdhci_host *host);
};
-@@ -274,6 +285,8 @@ extern struct sdhci_host *sdhci_alloc_ho
+@@ -277,6 +286,8 @@ extern struct sdhci_host *sdhci_alloc_ho
size_t priv_size);
extern void sdhci_free_host(struct sdhci_host *host);
return (void *)host->private;
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
-@@ -391,6 +391,7 @@ static int sdhci_pci_enable_dma(struct s
+@@ -392,6 +392,7 @@ static int sdhci_pci_enable_dma(struct s
static struct sdhci_ops sdhci_pci_ops = {
.enable_dma = sdhci_pci_enable_dma,
+ /* It seems we do not get an DATA transfer complete on non-busy
+ * transfers, not sure if this is a problem with this specific
+ * SDHCI block, or a missing configuration that needs to be set. */
-+ host->quirks |= SDHCI_QUIRK_NO_TCIRQ_ON_NOT_BUSY;
++ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
+
+ host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
+ SDHCI_QUIRK_32BIT_DMA_SIZE);
snd_soc_dapm_input = 0, /* input pin */
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -732,6 +732,15 @@ config AIO
+@@ -720,6 +720,15 @@ config AIO
by some high performance threaded applications. Disabling
this option saves about 7k.