- membase: (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
- mapbase: IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
- iotype: SERIAL_IO_MEM,
- irq: IFXMIPSASC_RIR(1),
- uartclk: 0,
- fifosize: 16,
- type: PORT_IFXMIPSASC,
- ops: &ifxmipsasc_pops,
- flags: ASYNC_BOOT_AUTOCONF,
+ .membase = (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
+ .mapbase = IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
+ .iotype = SERIAL_IO_MEM,
+ .irq = IFXMIPSASC_TIR(1),
+ .uartclk = 0,
+ .fifosize = 16,
+ .type = PORT_IFXMIPSASC,
+ .ops = &ifxmipsasc_pops,
+ .flags = ASYNC_BOOT_AUTOCONF,
+ .line = 1