diff -urN linux.old/arch/mips/bcm947xx/bcmsrom.c linux.dev/arch/mips/bcm947xx/bcmsrom.c
--- linux.old/arch/mips/bcm947xx/bcmsrom.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/bcmsrom.c 2006-10-02 21:19:59.000000000 +0200
-@@ -0,0 +1,1212 @@
+@@ -0,0 +1,1213 @@
+/*
+ * Misc useful routines to access NIC SROM/OTP .
+ *
+
+ nw = crc_range / 2;
+ /* read first 64 words from srom */
-+ if (srom_read(bustype, curmap, osh, 0, nw * 2, image))
++ if (srom_read(bustype, curmap, osh, 0, crc_range, image))
+ return 1;
+ if (image[SROM4_SIGN] == SROM4_SIGNATURE) {
+ crc_range = SROM4_WORDS;
+ nw = crc_range / 2;
-+ if (srom_read(bustype, curmap, osh, 0, nw * 2, image))
++ if (srom_read(bustype, curmap, osh, 0, crc_range, image))
+ return 1;
+ }
+ /* make changes */
+
+ err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b,
+ 64, TRUE);
-+ if (err == 0) {
++ if (b[SROM4_SIGN] == SROM4_SIGNATURE) {
++ /* sromrev >= 4, read more */
++ err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, SROM4_WORDS, TRUE);
++ sromrev = b[SROM4_WORDS - 1] & 0xff;
++ } else if (err == 0) {
+ /* srom is good and is rev < 4 */
+ /* top word of sprom contains version and crc8 */
+ sromrev = b[63] & 0xff;
+ /* bcm4401 sroms misprogrammed */
+ if (sromrev == 0x10)
+ sromrev = 1;
-+ } else if (b[SROM4_SIGN] == SROM4_SIGNATURE) {
-+ /* If sromrev >= 4, read more */
-+ err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b,
-+ SROM4_WORDS, TRUE);
-+ sromrev = b[SROM4_WORDS - 1] & 0xff;
+ }
+
+ if (err) {
+ vp++;
+ }
+ /* LED Powersave duty cycle (oncount >> 24) (offcount >> 8) */
-+ w = b[SROM4_LEDDC];
-+ w32 = ((uint32)((unsigned char)(w >> 8) & 0xff) << 24) | /* oncount */
-+ ((uint32)((unsigned char)(w & 0xff)) << 8); /* offcount */
-+ vp += sprintf(vp, "leddc=%d", w32);
-+ vp++;
++ if (w != 0xffff) {
++ w = b[SROM4_LEDDC];
++ w32 = ((uint32)((unsigned char)(w >> 8) & 0xff) << 24) | /* oncount */
++ ((uint32)((unsigned char)(w & 0xff)) << 8); /* offcount */
++ vp += sprintf(vp, "leddc=%d", w32);
++ vp++;
++ }
+
+ w = b[SROM4_AA];
+ vp += sprintf(vp, "aa2g=%d", w & SROM4_AA2G_MASK);
diff -urN linux.old/arch/mips/bcm947xx/export.c linux.dev/arch/mips/bcm947xx/export.c
--- linux.old/arch/mips/bcm947xx/export.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/export.c 2006-10-02 21:19:59.000000000 +0200
-@@ -0,0 +1,65 @@
+@@ -0,0 +1,71 @@
+#include <linux/module.h>
+
+#define _export(n) \
+_export(sb_coreflags)
+_export(sb_coreflagshi)
+_export(sb_coreidx)
++_export(sb_coreregs)
+_export(sb_corerev)
+_export(sb_coreunit)
+_export(sb_detach)
+_export(sb_deviceremoved)
+_export(sb_gpiosetcore)
+_export(sb_gpiocontrol)
++_export(sb_gpiointmask)
++_export(sb_gpiointpolarity)
+_export(sb_gpioled)
+_export(sb_gpioin)
+_export(sb_gpioout)
+_export(sb_gpioouten)
+_export(sb_gpiotimerval)
++_export(sb_irq)
+_export(sb_iscoreup)
+_export(sb_pci_setup)
+_export(sb_pcirev)
+_export(sb_pcmciarev)
+_export(sb_register_intr_callback)
+_export(sb_setcore)
++_export(sb_setcoreidx)
+_export(sb_war16165)
++_export(sb_war32414_forceHT)
+_export(sb_osh)
+
+_export(getvar)
diff -urN linux.old/arch/mips/bcm947xx/generic/Makefile linux.dev/arch/mips/bcm947xx/generic/Makefile
--- linux.old/arch/mips/bcm947xx/generic/Makefile 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/generic/Makefile 2006-10-02 21:26:29.000000000 +0200
-@@ -0,0 +1,16 @@
+@@ -0,0 +1,12 @@
+#
+# Makefile for the BCM947xx specific kernel interface routines
+# under Linux.
+#
+EXTRA_CFLAGS += -fno-delayed-branch
-+
-+.S.s:
-+ $(CPP) $(AFLAGS) $< -o $*.s
-+.S.o:
-+ $(CC) $(AFLAGS) -c $< -o $*.o
++USE_STANDARD_AS_RULE := true
+
+O_TARGET := brcm.o
+
diff -urN linux.old/arch/mips/bcm947xx/include/osl.h linux.dev/arch/mips/bcm947xx/include/osl.h
--- linux.old/arch/mips/bcm947xx/include/osl.h 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/include/osl.h 2006-10-02 21:19:59.000000000 +0200
-@@ -0,0 +1,179 @@
+@@ -0,0 +1,181 @@
+#ifndef __osl_h
+#define __osl_h
+
+#define ASSERT(n)
+
+/* Pkttag flag should be part of public information */
-+struct osl_pubinfo {
++typedef struct {
+ bool pkttag;
+ uint pktalloced; /* Number of allocated packet buffers */
-+};
++ void *tx_fn;
++ void *tx_ctx;
++} osl_pubinfo_t;
+
+struct osl_info {
-+ struct osl_pubinfo pub;
++ osl_pubinfo_t pub;
+ uint magic;
+ void *pdev;
+ uint malloced;
diff -urN linux.old/arch/mips/bcm947xx/include/sbutils.h linux.dev/arch/mips/bcm947xx/include/sbutils.h
--- linux.old/arch/mips/bcm947xx/include/sbutils.h 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/include/sbutils.h 2006-10-02 21:19:59.000000000 +0200
-@@ -0,0 +1,150 @@
+@@ -0,0 +1,151 @@
+/*
+ * Misc utility routines for accessing chip-specific features
+ * of Broadcom HNBU SiliconBackplane-based chips.
+/* GPIO usage priorities */
+#define GPIO_DRV_PRIORITY 0 /* Driver */
+#define GPIO_APP_PRIORITY 1 /* Application */
++#define GPIO_HI_PRIORITY 2 /* Highest priority. Ignore GPIO reservation */
+
+/* device path */
+#define SB_DEVPATH_BUFSZ 16 /* min buffer size in bytes */
diff -urN linux.old/arch/mips/bcm947xx/sbutils.c linux.dev/arch/mips/bcm947xx/sbutils.c
--- linux.old/arch/mips/bcm947xx/sbutils.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/sbutils.c 2006-10-02 21:19:59.000000000 +0200
-@@ -0,0 +1,3081 @@
+@@ -0,0 +1,3103 @@
+/*
+ * Misc utility routines for accessing chip-specific features
+ * of the SiliconBackplane-based Broadcom chips.
+#define PCIE_CONFIGREGS 1 /* Access to config space */
+#define PCIE_PCIEREGS 2 /* Access to pcie registers */
+
++/* force HT war check */
++#define FORCEHT_WAR32414(si) \
++ ((PCIE(si)) && (((si->sb.chip == BCM4311_CHIP_ID) && (si->sb.chiprev == 1)) || \
++ ((si->sb.chip == BCM4321_CHIP_ID) && (si->sb.chiprev <= 3))))
++
+/* GPIO Based LED powersave defines */
+#define DEFAULT_GPIO_ONTIME 10 /* Default: 10% on */
+#define DEFAULT_GPIO_OFFTIME 90 /* Default: 10% on */
+}
+#endif /* !BCMBUSTYPE || (BCMBUSTYPE == SB_BUS) */
+
++void
++BCMINITFN(sb_war32414_forceHT)(sb_t *sbh, bool forceHT)
++{
++ sb_info_t *si;
++
++ si = SB_INFO(sbh);
++
++
++ if (FORCEHT_WAR32414(si)) {
++ uint32 val = 0;
++ if (forceHT)
++ val = SYCC_HR;
++ sb_corereg((void*)si, SB_CC_IDX, OFFSETOF(chipcregs_t, system_clk_ctl),
++ SYCC_HR, val);
++ }
++}
++
+static sb_info_t *
+BCMINITFN(sb_doattach)(sb_info_t *si, uint devid, osl_t *osh, void *regs,
+ uint bustype, void *sdh, char **vars, uint *varsz)
+ w = DEFAULT_GPIOTIMERVAL;
+ sb_corereg(si, 0, OFFSETOF(chipcregs_t, gpiotimerval), ~0, w);
+ }
-+ if ((si->sb.chip == BCM4311_CHIP_ID) && (si->sb.chiprev <= 1)) {
++ if (FORCEHT_WAR32414(si)) {
+ /* set proper clk setup delays before forcing HT */
+ sb_clkctl_init((void *)si);
-+ sb_corereg((void*)si, SB_CC_IDX, OFFSETOF(chipcregs_t, system_clk_ctl),
-+ SYCC_HR, SYCC_HR);
++ sb_war32414_forceHT((void *)si, 1);
+ }
+
+
+ return (si);
+}
+
++
+uint
+sb_coreid(sb_t *sbh)
+{
+#define read_pci_cfg_byte(a) \
+ (BYTE_VAL(OSL_PCI_READ_CONFIG(si->osh, DWORD_ALIGN(a), 4), a) & 0xff)
+
-+#define read_pci_cfg_write(a) \
++#define read_pci_cfg_word(a) \
+ (WORD_VAL(OSL_PCI_READ_CONFIG(si->osh, DWORD_ALIGN(a), 4), a) & 0xffff)
+
+
projects / openwrt.git / blobdiff