X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/032445afeec0a2729bd2859138a1d3ef7a0958f4..0b9f62a797253b25939b69b5820a1cc7d89d0220:/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index d5f7743d4..ac52896ab 100644
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -1,7 +1,7 @@
 /*
  *  Atheros AR71xx built-in ethernet mac driver
  *
- *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  Based on Atheros' AG7100 driver
@@ -38,9 +38,10 @@
 #define ETH_FCS_LEN	4
 
 #define AG71XX_DRV_NAME		"ag71xx"
-#define AG71XX_DRV_VERSION	"0.5.11"
+#define AG71XX_DRV_VERSION	"0.5.25"
 
 #define AG71XX_NAPI_WEIGHT	64
+#define AG71XX_OOM_REFILL	(1 + HZ/10)
 
 #define AG71XX_INT_ERR	(AG71XX_INT_RX_BE | AG71XX_INT_TX_BE)
 #define AG71XX_INT_TX	(AG71XX_INT_TX_PS)
@@ -62,8 +63,7 @@
 
 #define AG71XX_RX_RING_SIZE	128
 
-#undef AG71XX_DEBUG
-#ifdef AG71XX_DEBUG
+#ifdef CONFIG_AG71XX_DEBUG
 #define DBG(fmt, args...)	printk(KERN_DEBUG fmt, ## args)
 #else
 #define DBG(fmt, args...)	do {} while (0)
@@ -82,32 +82,35 @@ struct ag71xx_desc {
 	u32	ctrl;
 #define DESC_EMPTY	BIT(31)
 #define DESC_MORE	BIT(24)
-#define DESC_PKTLEN_M	0x1fff
+#define DESC_PKTLEN_M	0xfff
 	u32	next;
-};
+	u32	pad;
+} __attribute__((aligned(4)));
 
 struct ag71xx_buf {
 	struct sk_buff	*skb;
+	struct ag71xx_desc *desc;
 };
 
 struct ag71xx_ring {
 	struct ag71xx_buf	*buf;
-	struct ag71xx_desc	*descs;
+	u8			*descs_cpu;
 	dma_addr_t		descs_dma;
+	unsigned int		desc_size;
 	unsigned int		curr;
 	unsigned int		dirty;
 	unsigned int		size;
 };
 
 struct ag71xx_mdio {
-	struct mii_bus	mii_bus;
-	int		mii_irq[PHY_MAX_ADDR];
-	void __iomem	*mdio_base;
+	struct mii_bus		*mii_bus;
+	int			mii_irq[PHY_MAX_ADDR];
+	void __iomem		*mdio_base;
+	struct ag71xx_mdio_platform_data *pdata;
 };
 
 struct ag71xx {
 	void __iomem		*mac_base;
-	void __iomem		*mac_base2;
 	void __iomem		*mii_ctrl;
 
 	spinlock_t		lock;
@@ -127,18 +130,18 @@ struct ag71xx {
 	int 			duplex;
 
 	struct work_struct	restart_work;
+	struct timer_list	oom_timer;
 };
 
 extern struct ethtool_ops ag71xx_ethtool_ops;
 
-extern struct ag71xx_mdio *ag71xx_mdio_bus;
-extern int ag71xx_mdio_driver_init(void) __init;
-extern void ag71xx_mdio_driver_exit(void);
+int ag71xx_mdio_driver_init(void) __init;
+void ag71xx_mdio_driver_exit(void);
 
-extern int ag71xx_phy_connect(struct ag71xx *ag);
-extern void ag71xx_phy_disconnect(struct ag71xx *ag);
-extern void ag71xx_phy_start(struct ag71xx *ag);
-extern void ag71xx_phy_stop(struct ag71xx *ag);
+int ag71xx_phy_connect(struct ag71xx *ag);
+void ag71xx_phy_disconnect(struct ag71xx *ag);
+void ag71xx_phy_start(struct ag71xx *ag);
+void ag71xx_phy_stop(struct ag71xx *ag);
 
 static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag)
 {
@@ -225,7 +228,7 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG4_DV		BIT(1)	/* RX_DV Event */
 #define FIFO_CFG4_FC		BIT(2)	/* False Carrier */
 #define FIFO_CFG4_CE		BIT(3)	/* Code Error */
-#define FIFO_CFG4_CRC		BIT(4)	/* CRC error */
+#define FIFO_CFG4_CR		BIT(4)	/* CRC error */
 #define FIFO_CFG4_LM		BIT(5)	/* Length Mismatch */
 #define FIFO_CFG4_LO		BIT(6)	/* Length out of range */
 #define FIFO_CFG4_OK		BIT(7)	/* Packet is OK */
@@ -256,6 +259,8 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG5_VT		BIT(13)	/* VLAN tag detected */
 #define FIFO_CFG5_LE		BIT(14)	/* Long Event */
 #define FIFO_CFG5_FT		BIT(15)	/* Frame Truncated */
+#define FIFO_CFG5_16		BIT(16)	/* unknown */
+#define FIFO_CFG5_17		BIT(17)	/* unknown */
 #define FIFO_CFG5_SF		BIT(18)	/* Short Frame */
 #define FIFO_CFG5_BM		BIT(19)	/* Byte Mode */
 
@@ -308,14 +313,12 @@ static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
 
 	switch (reg) {
 	case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-		r = ag->mac_base + reg;
-		__raw_writel(value, r);
-		__raw_readl(r);
-		break;
 	case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-		r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+		r = ag->mac_base + reg;
 		__raw_writel(value, r);
-		__raw_readl(r);
+
+		/* flush write */
+		(void) __raw_readl(r);
 		break;
 	default:
 		BUG();
@@ -329,11 +332,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
 
 	switch (reg) {
 	case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-		r = ag->mac_base + reg;
-		ret = __raw_readl(r);
-		break;
 	case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-		r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+		r = ag->mac_base + reg;
 		ret = __raw_readl(r);
 		break;
 	default:
@@ -349,14 +349,12 @@ static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
 
 	switch (reg) {
 	case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-		r = ag->mac_base + reg;
-		__raw_writel(__raw_readl(r) | mask, r);
-		__raw_readl(r);
-		break;
 	case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-		r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+		r = ag->mac_base + reg;
 		__raw_writel(__raw_readl(r) | mask, r);
-		__raw_readl(r);
+
+		/* flush write */
+		(void)__raw_readl(r);
 		break;
 	default:
 		BUG();
@@ -369,14 +367,12 @@ static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
 
 	switch (reg) {
 	case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-		r = ag->mac_base + reg;
-		__raw_writel(__raw_readl(r) & ~mask, r);
-		__raw_readl(r);
-		break;
 	case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-		r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+		r = ag->mac_base + reg;
 		__raw_writel(__raw_readl(r) & ~mask, r);
-		__raw_readl(r);
+
+		/* flush write */
+		(void) __raw_readl(r);
 		break;
 	default:
 		BUG();
@@ -395,12 +391,24 @@ static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints)
 
 static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value)
 {
+	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+
+	if (pdata->is_ar724x)
+		return;
+
 	__raw_writel(value, ag->mii_ctrl);
+
+	/* flush write */
 	__raw_readl(ag->mii_ctrl);
 }
 
 static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)
 {
+	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+
+	if (pdata->is_ar724x)
+		return 0xffffffff;
+
 	return __raw_readl(ag->mii_ctrl);
 }
 
@@ -426,4 +434,20 @@ static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
 	ag71xx_mii_ctrl_wr(ag, t);
 }
 
+#ifdef CONFIG_AG71XX_AR8216_SUPPORT
+void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
+int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
+#else
+static inline void ag71xx_add_ar8216_header(struct ag71xx *ag,
+					   struct sk_buff *skb)
+{
+}
+
+static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag,
+					      struct sk_buff *skb)
+{
+	return 0;
+}
+#endif
+
 #endif /* _AG71XX_H */