X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/11cce4134366fce85ad1f58eda28ffcceee44b82..f0589f7290ba958bbefaf5394b155d37c72a185e:/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch

diff --git a/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch b/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch
index 981740c56..84bba9b1c 100644
--- a/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch
+++ b/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch
@@ -45,8 +45,35 @@
  
 --- a/drivers/net/cpmac.c
 +++ b/drivers/net/cpmac.c
-@@ -1243,6 +1243,10 @@ int __devinit cpmac_init(void)
- 	ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+@@ -1153,6 +1153,8 @@ static int __devinit cpmac_probe(struct
+ 		goto fail;
+ 	}
+ 
++	ar7_device_reset(pdata->reset_bit);
++
+ 	dev->irq = platform_get_irq_byname(pdev, "irq");
+ 
+ 	dev->netdev_ops = &cpmac_netdev_ops;
+@@ -1229,7 +1231,7 @@ int __devinit cpmac_init(void)
+ 	cpmac_mii->reset = cpmac_mdio_reset;
+ 	cpmac_mii->irq = mii_irqs;
+ 
+-	cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
++	cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
+ 
+ 	if (!cpmac_mii->priv) {
+ 		printk(KERN_ERR "Can't ioremap mdio registers\n");
+@@ -1240,10 +1242,17 @@ int __devinit cpmac_init(void)
+ #warning FIXME: unhardcode gpio&reset bits
+ 	ar7_gpio_disable(26);
+ 	ar7_gpio_disable(27);
+-	ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+-	ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++
++	if (!ar7_is_titan()) {
++		ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
++		ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++	}
  	ar7_device_reset(AR7_RESET_BIT_EPHY);
  
 +	if (ar7_is_titan()) {
@@ -56,7 +83,7 @@
  	cpmac_mii->reset(cpmac_mii);
  
  	for (i = 0; i < 300; i++)
-@@ -1257,7 +1261,8 @@ int __devinit cpmac_init(void)
+@@ -1258,7 +1267,8 @@ int __devinit cpmac_init(void)
  		mask = 0;
  	}
  
@@ -66,3 +93,18 @@
  	snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
  
  	res = mdiobus_register(cpmac_mii);
+--- a/arch/mips/include/asm/mach-ar7/ar7.h
++++ b/arch/mips/include/asm/mach-ar7/ar7.h
+@@ -50,8 +50,10 @@
+ #define UR8_REGS_WDT	(AR7_REGS_BASE + 0x0b00)
+ #define UR8_REGS_UART1	(AR7_REGS_BASE + 0x0f00)
+ 
+-#define TITAN_REGS_MAC0		(0x08640000)
+-#define TITAN_REGS_MAC1		(TITAN_REGS_MAC0 + 0x0800)
++#define TITAN_REGS_ESWITCH_BASE	(0x08640000)
++#define TITAN_REGS_MAC0			(TITAN_REGS_ESWITCH_BASE + 0)
++#define TITAN_REGS_MAC1			(TITAN_REGS_ESWITCH_BASE + 0x0800)
++#define TITAN_REGS_MDIO			(TITAN_REGS_ESWITCH_BASE + 0x02000)
+ #define TITAN_REGS_VLYNQ0	(AR7_REGS_BASE + 0x1c00)
+ #define TITAN_REGS_VLYNQ1	(AR7_REGS_BASE + 0x1300)
+