X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/1d9d5a2aa40d66a8c9f69a9f7c76c2826fbb6860..2f9debdfd65fb630efae4aad1725f36c6804f2d0:/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch

diff --git a/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch b/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
index c341ecfb7..973487846 100644
--- a/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
+++ b/openwrt/target/linux/linux-2.4/patches/brcm/001-bcm47xx.patch
@@ -10576,8 +10576,8 @@ diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom.
 +}
 diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbmips.c
 --- linux.old/arch/mips/bcm947xx/sbmips.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/arch/mips/bcm947xx/sbmips.c	2005-08-27 02:46:21.265608528 +0200
-@@ -0,0 +1,1036 @@
++++ linux.dev/arch/mips/bcm947xx/sbmips.c	2005-09-01 01:30:26.074176728 +0200
+@@ -0,0 +1,1033 @@
 +/*
 + * BCM47XX Sonics SiliconBackplane MIPS core routines
 + *
@@ -10694,8 +10694,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
 +				/* Internal backplane clock */
 +				baud_base = sb_clock(sbh);
 +				div = 2;	/* Minimum divisor */
-+				W_REG(&cc->clkdiv,
-+				      ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
++				W_REG(&cc->clkdiv, ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
 +			} else {
 +				/* Fixed internal backplane clock */
 +				baud_base = 88000000;
@@ -10960,14 +10959,13 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
 +		tmp = tmp | CEIL(120, ns);		/* W0 = 120nS */
 +		W_REG(&eir->prog_waitcount, tmp);	/* 0x01020a0c for a 100Mhz clock */
 +	} else if ((cc = sb_setcore(sbh, SB_CC, 0))) {
-+	
 +//==================================tallest===============================================
 +		/* set register for external IO to control LED. */
-+		W_REG(&cc->prog_config, 0x11);
-+		tmp = CEIL(10, ns) << FW_W3_SHIFT;      /* W3 = 10nS */
-+		tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
-+		tmp = tmp | CEIL(240, ns);              /* W0 = 120nS */
-+		W_REG(&cc->prog_waitcount, tmp);        /* 0x01020a0c for a 100Mhz clock */
++                W_REG(&cc->prog_config, 0x11);
++                tmp = CEIL(10, ns) << FW_W3_SHIFT;      /* W3 = 10nS */
++                tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
++                tmp = tmp | CEIL(240, ns);              /* W0 = 120nS */
++                W_REG(&cc->prog_waitcount, tmp);        /* 0x01020a0c for a 100Mhz clock */
 +//========================================================================================
 +		/* Set timing for the flash */
 +		tmp = CEIL(10, ns) << FW_W3_SHIFT;	/* W3 = 10nS */
@@ -10990,7 +10988,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
 +				W_REG(&cc->pcmcia_memwait, tmp);
 +			}
 +		}
-+		
++
 +		// Added by Chen-I & Yen for enabling 5350 EXTIF
 +		if (BCMINIT(sb_chip)(sbh) == BCM5350_DEVICE_ID) 
 +		{
@@ -11587,8 +11585,7 @@ diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbm
 +	if (config & MEMC_CONFIG_DDR) {
 +		ret = (wr << 16) | (rd << 8) | dqsg;
 +	} else {
-+		if ( (rev > 0)  || (sb_chip(sbh) == BCM5365_DEVICE_ID))
-+
++		if ((rev > 0) || (sb_chip(sbh) == BCM5365_DEVICE_ID))
 +			cd = rd;
 +		else
 +			cd = (rd == MEMC_CD_THRESHOLD) ? rd : (wr + MEMC_CD_THRESHOLD);
@@ -12932,7 +12929,7 @@ diff -urN linux.old/arch/mips/pci/Makefile linux.dev/arch/mips/pci/Makefile
  include $(TOPDIR)/Rules.make
 diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c
 --- linux.old/drivers/char/serial.c	2005-08-26 13:41:41.952594192 +0200
-+++ linux.dev/drivers/char/serial.c	2005-08-26 13:44:34.340387264 +0200
++++ linux.dev/drivers/char/serial.c	2005-09-01 02:33:38.312794792 +0200
 @@ -444,6 +444,10 @@
  		return inb(info->port+1);
  #endif
@@ -12954,6 +12951,30 @@ diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c
  		break;
  	default:
  		outb(value, info->port+offset);
+@@ -1728,7 +1735,7 @@
+ 			/* Special case since 134 is really 134.5 */
+ 			quot = (2*baud_base / 269);
+ 		else if (baud)
+-			quot = baud_base / baud;
++			quot = (baud_base + (baud / 2)) / baud;
+ 	}
+ 	/* If the quotient is zero refuse the change */
+ 	if (!quot && old_termios) {
+@@ -1745,12 +1752,12 @@
+ 				/* Special case since 134 is really 134.5 */
+ 				quot = (2*baud_base / 269);
+ 			else if (baud)
+-				quot = baud_base / baud;
++				quot = (baud_base + (baud / 2)) / baud;
+ 		}
+ 	}
+ 	/* As a last resort, if the quotient is zero, default to 9600 bps */
+ 	if (!quot)
+-		quot = baud_base / 9600;
++		quot = (baud_base + 4800) / 9600;
+ 	/*
+ 	 * Work around a bug in the Oxford Semiconductor 952 rev B
+ 	 * chip which causes it to seriously miscalculate baud rates
 @@ -5996,6 +6003,13 @@
  	 *	Divisor, bytesize and parity
  	 */
@@ -12968,6 +12989,15 @@ diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c
  	if (doflow)
  		state->flags |= ASYNC_CONS_FLOW;
  	info = &async_sercons;
+@@ -6009,7 +6023,7 @@
+ 	info->io_type = state->io_type;
+ 	info->iomem_base = state->iomem_base;
+ 	info->iomem_reg_shift = state->iomem_reg_shift;
+-	quot = state->baud_base / baud;
++	quot = (state->baud_base + (baud / 2)) / baud;
+ 	cval = cflag & (CSIZE | CSTOPB);
+ #if defined(__powerpc__) || defined(__alpha__)
+ 	cval >>= 8;
 diff -urN linux.old/drivers/mtd/maps/Config.in linux.dev/drivers/mtd/maps/Config.in
 --- linux.old/drivers/mtd/maps/Config.in	2005-08-26 13:41:41.963592520 +0200
 +++ linux.dev/drivers/mtd/maps/Config.in	2005-08-26 13:44:34.345386504 +0200
@@ -16453,8 +16483,8 @@ diff -urN linux.old/drivers/net/hnd/linux_osl.c linux.dev/drivers/net/hnd/linux_
 +#endif	/* BINOSL */
 diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.c
 --- linux.old/drivers/net/hnd/sbutils.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/drivers/net/hnd/sbutils.c	2005-08-27 03:11:17.525240184 +0200
-@@ -0,0 +1,2064 @@
++++ linux.dev/drivers/net/hnd/sbutils.c	2005-09-01 01:33:48.212447040 +0200
+@@ -0,0 +1,2061 @@
 +/*
 + * Misc utility routines for accessing chip-specific features
 + * of the SiliconBackplane-based Broadcom chips.
@@ -16466,7 +16496,7 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ * $Id$
++ * $Id: sbutils.c,v 1.6 2005/03/07 08:35:32 kanki Exp $
 + */
 +
 +#include <typedefs.h>
@@ -16486,8 +16516,6 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
 +#define	SB_ERROR(args)
 +
 +
-+#define CLOCK_BASE_5350		12500000 /* Specific to 5350*/
-+
 +typedef uint32 (*sb_intrsoff_t)(void *intr_arg);
 +typedef void (*sb_intrsrestore_t)(void *intr_arg, uint32 arg);
 +typedef bool (*sb_intrsenabled_t)(void *intr_arg);
@@ -17937,13 +17965,8 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
 +		n = R_REG(&cc->clockcontrol_n);
 +		if (pll_type == PLL_TYPE6)
 +			m = R_REG(&cc->clockcontrol_mips);
-+		else if (pll_type == PLL_TYPE3)
-+		{
-+			// Added by Chen-I for 5365 
-+			if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID) 	
-+				m = R_REG(&cc->clockcontrol_sb);
-+			else m = R_REG(&cc->clockcontrol_m2);
-+		}
++		else if ((pll_type == PLL_TYPE3) && (BCMINIT(sb_chip)(sbh) != BCM5365_DEVICE_ID))
++			m = R_REG(&cc->clockcontrol_m2);
 +		else
 +			m = R_REG(&cc->clockcontrol_sb);
 +	} else {
@@ -17951,11 +17974,15 @@ diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.
 +		return 0;
 +	}
 +
-+	/* calculate rate */
-+	rate = sb_clock_rate(pll_type, n, m);
++	if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID) {
++		rate = 100000000;
++	} else {
++		/* calculate rate */
++		rate = sb_clock_rate(pll_type, n, m);
++		if (pll_type == PLL_TYPE3)
++			rate = rate / 2;
++	}
 +
-+	if (pll_type == PLL_TYPE3)
-+		rate = rate / 2;
 +
 +	/* switch back to previous core */
 +	sb_setcoreidx(sbh, idx);