X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/414e59d258bd0298c6dc0fe6a4ffff321d1afa21..693c0bd5957a6130f8cb0f94acdbc56be8f716cb:/target/linux/xburst/patches-2.6.32/050-nand.patch?ds=sidebyside

diff --git a/target/linux/xburst/patches-2.6.32/050-nand.patch b/target/linux/xburst/patches-2.6.32/050-nand.patch
index e803a218b..9a8662b0a 100644
--- a/target/linux/xburst/patches-2.6.32/050-nand.patch
+++ b/target/linux/xburst/patches-2.6.32/050-nand.patch
@@ -31,49 +31,3 @@ Subject: [PATCH] /opt/Projects/openwrt/target/linux/xburst/patches-2.6.31/050-na
 +obj-$(CONFIG_MTD_NAND_JZ4740)		+= jz4740_nand.o
  
  nand-objs := nand_base.o nand_bbt.o
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -956,29 +956,22 @@ static int nand_read_page_hwecc(struct m
- 	uint8_t *ecc_calc = chip->buffers->ecccalc;
- 	uint8_t *ecc_code = chip->buffers->ecccode;
- 	uint32_t *eccpos = chip->ecc.layout->eccpos;
--
--	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
--		chip->ecc.hwctl(mtd, NAND_ECC_READ);
--		chip->read_buf(mtd, p, eccsize);
--		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
--	}
--	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
-+	int stat;
- 
- 	for (i = 0; i < chip->ecc.total; i++)
- 		ecc_code[i] = chip->oob_poi[eccpos[i]];
- 
--	eccsteps = chip->ecc.steps;
--	p = buf;
--
--	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
--		int stat;
- 
-+	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
-+		chip->ecc.hwctl(mtd, NAND_ECC_READ);
-+		chip->read_buf(mtd, p, eccsize);
- 		stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
- 		if (stat < 0)
- 			mtd->ecc_stats.failed++;
- 		else
- 			mtd->ecc_stats.corrected += stat;
- 	}
-+
- 	return 0;
- }
- 
-@@ -1178,6 +1171,8 @@ static int nand_do_read_ops(struct mtd_i
- 			bufpoi = aligned ? buf : chip->buffers->databuf;
- 
- 			if (likely(sndcmd)) {
-+				chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x00, page);
-+				chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
- 				chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
- 				sndcmd = 0;
- 			}