X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/474e65cbab6cad7dbf74b7cb62acb02aa12403a3..47fedb5947414d3b46786a94186b123295ba0f48:/target/linux/rb532/patches-2.6.28/002-pci_io_map_base.patch diff --git a/target/linux/rb532/patches-2.6.28/002-pci_io_map_base.patch b/target/linux/rb532/patches-2.6.28/002-pci_io_map_base.patch new file mode 100644 index 000000000..5786803e4 --- /dev/null +++ b/target/linux/rb532/patches-2.6.28/002-pci_io_map_base.patch @@ -0,0 +1,42 @@ +The code is rather based on trial-and-error than knowledge. Verified Via +Rhine functionality in PIO as well as MMIO mode. + +Signed-off-by: Phil Sutter +Tested-by: Florian Fainelli +--- + arch/mips/pci/pci-rc32434.c | 11 +++++++++++ + 1 files changed, 11 insertions(+), 0 deletions(-) + +diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c +index 1c2821e..71f7d27 100644 +--- a/arch/mips/pci/pci-rc32434.c ++++ b/arch/mips/pci/pci-rc32434.c +@@ -205,6 +205,8 @@ static int __init rc32434_pcibridge_init(void) + + static int __init rc32434_pci_init(void) + { ++ void __iomem *io_map_base; ++ + pr_info("PCI: Initializing PCI\n"); + + ioport_resource.start = rc32434_res_pci_io1.start; +@@ -212,6 +214,15 @@ static int __init rc32434_pci_init(void) + + rc32434_pcibridge_init(); + ++ io_map_base = ioremap(rc32434_res_pci_io1.start, ++ rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1); ++ ++ if (!io_map_base) ++ return -ENOMEM; ++ ++ rc32434_controller.io_map_base = ++ (unsigned long)io_map_base - rc32434_res_pci_io1.start; ++ + register_pci_controller(&rc32434_controller); + rc32434_sync(); + +-- +1.5.6.4 + +