X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/546b5ed544503182a9b3e981bc11feebd6042b21..0a008c0a0be1e18e708a1af47de7487fcd44a93e:/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c?ds=sidebyside

diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
index e3e80a901..383a708b8 100644
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
@@ -59,17 +59,18 @@ static inline void ar71xx_pcicfg_wr(unsigned int reg, u32 val)
 
 /* Byte lane enable bits */
 static u8 ble_table[4][4] = {
-	{0xf, 0xe, 0xd, 0xc},
-	{0xc, 0x9, 0x3, 0x1},
-	{0x0, 0x0, 0x0, 0x0},
-	{0x0, 0x0, 0x0, 0x0},
+	{0x0, 0xf, 0xf, 0xf},
+	{0xe, 0xd, 0xb, 0x7},
+	{0xc, 0xf, 0x3, 0xf},
+	{0xf, 0xf, 0xf, 0xf},
 };
 
 static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
 {
 	u32 t;
 
-	t = ble_table[size][where & 3];
+	t = ble_table[size & 3][where & 3];
+	BUG_ON(t == 0xf);
 	t <<= (local) ? 20 : 4;
 	return t;
 }
@@ -315,14 +316,14 @@ static int __init __ar71xx_pci_bios_init(unsigned nr_irqs,
 	ar71xx_pcicfg_base = ioremap_nocache(AR71XX_PCI_CFG_BASE,
 						AR71XX_PCI_CFG_SIZE);
 
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN0, PCI_WIN0_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN1, PCI_WIN1_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN2, PCI_WIN2_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN3, PCI_WIN3_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN4, PCI_WIN4_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN5, PCI_WIN5_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN6, PCI_WIN6_OFFS);
-	ar71xx_ddr_wr(DDR_REG_PCI_WIN7, PCI_WIN7_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN0, PCI_WIN0_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN1, PCI_WIN1_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN2, PCI_WIN2_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN3, PCI_WIN3_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN4, PCI_WIN4_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN5, PCI_WIN5_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN6, PCI_WIN6_OFFS);
+	ar71xx_ddr_wr(AR71XX_DDR_REG_PCI_WIN7, PCI_WIN7_OFFS);
 
 	ar71xx_pci_delay();