X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/6640cdb33ab941d30e0aaa8fd8d518de74c24b4c..a101c79bb0735e1dd5c90abc899ff7f7027ccadd:/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index 80c8e18ab..60ee3d9b6 100644
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -1,7 +1,7 @@
 /*
  *  Atheros AR71xx built-in ethernet mac driver
  *
- *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  Based on Atheros' AG7100 driver
@@ -38,9 +38,10 @@
 #define ETH_FCS_LEN	4
 
 #define AG71XX_DRV_NAME		"ag71xx"
-#define AG71XX_DRV_VERSION	"0.5.12"
+#define AG71XX_DRV_VERSION	"0.5.19"
 
 #define AG71XX_NAPI_WEIGHT	64
+#define AG71XX_OOM_REFILL	(1 + HZ/10)
 
 #define AG71XX_INT_ERR	(AG71XX_INT_RX_BE | AG71XX_INT_TX_BE)
 #define AG71XX_INT_TX	(AG71XX_INT_TX_PS)
@@ -84,6 +85,7 @@ struct ag71xx_desc {
 #define DESC_MORE	BIT(24)
 #define DESC_PKTLEN_M	0x1fff
 	u32	next;
+	u32	pad;
 };
 
 struct ag71xx_buf {
@@ -127,6 +129,7 @@ struct ag71xx {
 	int 			duplex;
 
 	struct work_struct	restart_work;
+	struct timer_list	oom_timer;
 };
 
 extern struct ethtool_ops ag71xx_ethtool_ops;
@@ -225,7 +228,7 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG4_DV		BIT(1)	/* RX_DV Event */
 #define FIFO_CFG4_FC		BIT(2)	/* False Carrier */
 #define FIFO_CFG4_CE		BIT(3)	/* Code Error */
-#define FIFO_CFG4_CRC		BIT(4)	/* CRC error */
+#define FIFO_CFG4_CR		BIT(4)	/* CRC error */
 #define FIFO_CFG4_LM		BIT(5)	/* Length Mismatch */
 #define FIFO_CFG4_LO		BIT(6)	/* Length out of range */
 #define FIFO_CFG4_OK		BIT(7)	/* Packet is OK */
@@ -256,6 +259,8 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define FIFO_CFG5_VT		BIT(13)	/* VLAN tag detected */
 #define FIFO_CFG5_LE		BIT(14)	/* Long Event */
 #define FIFO_CFG5_FT		BIT(15)	/* Frame Truncated */
+#define FIFO_CFG5_16		BIT(16)	/* unknown */
+#define FIFO_CFG5_17		BIT(17)	/* unknown */
 #define FIFO_CFG5_SF		BIT(18)	/* Short Frame */
 #define FIFO_CFG5_BM		BIT(19)	/* Byte Mode */