X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/68a5bde10c0b082aafaedcc1ba8e82a264c75105..c33ead0f7c493581d316afb48c2d300c16cd51a6:/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c index 76dd54013..b9ff9759e 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -23,9 +24,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #define PFX "board_bcm963xx: " @@ -42,15 +46,36 @@ static struct board_info board; static struct board_info __initdata board_96338gw = { .name = "96338GW", .expected_cpu_id = 0x6338, - + .has_enet0 = 1, .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, + .force_speed_100 = 1, + .force_duplex_full = 1, }, .has_ohci0 = 1, }; + +static struct board_info __initdata board_96338w = { + .name = "96338W", + .expected_cpu_id = 0x6338, + + .has_enet0 = 1, + .enet0 = { + .force_speed_100 = 1, + .force_duplex_full = 1, + } +}; +#endif + +/* + * known 6345 boards + */ +#ifdef CONFIG_BCM63XX_CPU_6345 +static struct board_info __initdata board_96345gw2 = { + .name = "96345GW2", + .expected_cpu_id = 0x6345, +}; #endif /* @@ -90,6 +115,14 @@ static struct board_info __initdata board_96348gw_10 = { .has_ohci0 = 1, .has_pccard = 1, .has_ehci0 = 1, + + .has_dsp = 1, + .dsp = { + .gpio_rst = 6, + .gpio_int = 34, + .cs = 2, + .ext_irq = 2, + }, }; static struct board_info __initdata board_96348gw_11 = { @@ -133,7 +166,15 @@ static struct board_info __initdata board_96348gw = { .force_duplex_full = 1, }, - .has_ohci0 = 1, + .has_ohci0 = 1, + .has_dsp = 1, + + .dsp = { + .gpio_rst = 6, + .gpio_int = 34, + .ext_irq = 2, + .cs = 2, + }, }; static struct board_info __initdata board_FAST2404 = { @@ -161,27 +202,23 @@ static struct board_info __initdata board_FAST2404 = { }; static struct board_info __initdata board_DV201AMR = { - .name = "DV201AMR", - .expected_cpu_id = 0x6348, + .name = "DV201AMR", + .expected_cpu_id = 0x6348, - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, + .has_pci = 1, + .has_ohci0 = 1, + .has_udc0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, .enet0 = { .has_phy = 1, .use_internal_phy = 1, }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, + .enet1 = { + .force_speed_100 = 1, + .force_duplex_full = 1, + }, }; static struct board_info __initdata board_96348gw_a = { @@ -258,6 +295,28 @@ static struct board_info __initdata board_96358vw2 = { .has_pccard = 1, .has_ehci0 = 1, }; + +static struct board_info __initdata board_AGPFS0 = { + .name = "AGPF-S0", + .expected_cpu_id = 0x6358, + + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, + + .enet0 = { + .has_phy = 1, + .use_internal_phy = 1, + }, + + .enet1 = { + .force_speed_100 = 1, + .force_duplex_full = 1, + }, + + .has_ohci0 = 1, + .has_ehci0 = 1, +}; #endif /* @@ -266,6 +325,10 @@ static struct board_info __initdata board_96358vw2 = { static const struct board_info __initdata *bcm963xx_boards[] = { #ifdef CONFIG_BCM63XX_CPU_6338 &board_96338gw, + &board_96338w, +#endif +#ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, #endif #ifdef CONFIG_BCM63XX_CPU_6348 &board_96348r, @@ -280,6 +343,7 @@ static const struct board_info __initdata *bcm963xx_boards[] = { #ifdef CONFIG_BCM63XX_CPU_6358 &board_96358vw, &board_96358vw2, + &board_AGPFS0, #endif }; @@ -293,9 +357,15 @@ void __init board_prom_init(void) char cfe_version[32]; u32 val; - /* read base address of boot chip select (0) */ - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; + /* read base address of boot chip select (0) + * 6338/6345 does not have MPI but boots from standard + * MIPS Flash address */ + if (BCMCPU_IS_6345()) + val = 0x1fc00000; + else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; + } boot_addr = (u8 *)KSEG1ADDR(val); /* dump cfe version */ @@ -348,13 +418,13 @@ void __init board_prom_init(void) * this has to be done this early since PCI init is done * inside arch_initcall */ val = 0; - +#ifdef CONFIG_PCI if (board.has_pci) { bcm63xx_pci_enabled = 1; if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G2_PCI; } - +#endif if (board.has_pccard) { if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G1_MII_PCCARD; @@ -447,6 +517,35 @@ static struct platform_device mtd_dev = { .num_resources = ARRAY_SIZE(mtd_resources), }; +/* + * Register a sane SPROMv2 to make the on-board + * bcm4318 WLAN work + */ +static struct ssb_sprom bcm63xx_sprom = { + .revision = 0x02, + .board_rev = 0x17, + .country_code = 0x0, + .ant_available_bg = 0x3, + .pa0b0 = 0x15ae, + .pa0b1 = 0xfa85, + .pa0b2 = 0xfe8d, + .pa1b0 = 0xffff, + .pa1b1 = 0xffff, + .pa1b2 = 0xffff, + .gpio0 = 0xff, + .gpio1 = 0xff, + .gpio2 = 0xff, + .gpio3 = 0xff, + .maxpwr_bg = 0x004c, + .itssi_bg = 0x00, + .boardflags_lo = 0x2848, + .boardflags_hi = 0x0000, +}; + +static struct resource gpiodev_resource = { + .start = 0xFFFFFFFF, +}; + /* * third stage init callback, register all board devices. */ @@ -456,6 +555,7 @@ int __init board_register_devices(void) bcm63xx_uart_register(); bcm63xx_wdt_register(); + bcm63xx_spi_register(); if (board.has_pccard) bcm63xx_pcmcia_register(); @@ -474,15 +574,38 @@ int __init board_register_devices(void) if (board.has_ehci0) bcm63xx_ehci_register(); + if (board.has_udc0) + bcm63xx_udc_register(); + + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); + + /* Generate MAC address for WLAN and + * register our SPROM */ +#ifdef CONFIG_PCI + if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { + memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); + if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) + printk(KERN_ERR "failed to register fallback SPROM\n"); + } +#endif /* read base address of boot chip select (0) */ - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; + if (BCMCPU_IS_6345()) + val = 0x1fc0000; + else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; + } mtd_resources[0].start = val; mtd_resources[0].end = 0x1FFFFFFF; platform_device_register(&mtd_dev); + /* Register GPIODEV */ + platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); + return 0; }