X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/69d56315efc39ca12491119db67f1e2033cd26cc..a43a8c98647194afa5528fd3afe26ea0b0781403:/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c index d0258524c..920f44ae4 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c @@ -16,17 +16,14 @@ #include #include -#include #include #include #include +#include #include #include -#define RT288X_MEM_SIZE_MIN (2 * 1024 * 1024) -#define RT288X_MEM_SIZE_MAX (128 * 1024 * 1024) - unsigned long rt288x_mach_type; static void rt288x_restart(char *command) @@ -43,20 +40,6 @@ static void rt288x_halt(void) cpu_wait(); } -static void __init rt288x_detect_mem_size(void) -{ - unsigned long size; - - for (size = RT288X_MEM_SIZE_MIN; size < RT288X_MEM_SIZE_MAX; - size <<= 1 ) { - if (!memcmp(rt288x_detect_mem_size, - rt288x_detect_mem_size + size, 1024)) - break; - } - - add_memory_region(RT2880_SDRAM_BASE, size, BOOT_MEM_RAM); -} - static void __init rt288x_early_serial_setup(void) { struct uart_port p; @@ -100,14 +83,11 @@ unsigned int __cpuinit get_c0_compare_irq(void) return CP0_LEGACY_COMPARE_IRQ; } -void __init plat_mem_setup(void) +void __init ramips_soc_setup(void) { - set_io_port_base(KSEG1); - rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE); rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE); - rt288x_detect_mem_size(); rt288x_detect_sys_type(); rt288x_detect_sys_freq();